VTFET Bottom Source Drain Extension Formation

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Solution Overview

Problem

Vertical transport field effect transistor (VTFET) devices face challenges in forming bottom source and drain extensions with abrupt dopant profiles due to the high thermal budget required, resulting in broad dopant profiles that are undesirable.

Innovation Solution

A method involving the use of a liner with higher diffusivity for dopants than the fins, allowing for dopant diffusion through the liner to form bottom extensions with an abrupt profile, reducing the thermal budget and achieving a unique concave dopant profile by using a lower annealing temperature.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a high thermal budget (900°C to 1050°C) is used for dopant drive-in to form bottom extensions, then the dopants diffuse into the fins to form extensions, but the resulting dopant profile is broad rather than abrupt

Engineering Contradiction:
Improvedopant profile abruptnessVSAvoidthermal budget
Core Design Contradiction:
Manufacturing precisionVSTemperature

Solution Approach 1:

A liner layer is introduced as an intermediary between the bottom source/drain and the fin. This liner has higher diffusivity for dopants than the fin material, allowing dopants to diffuse through it at lower temperatures (700°C to 950°C) to form abrupt extensions in the fin without requiring high thermal budget that would cause broad diffusion profiles

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the diffusivity parameter by introducing a liner material with different diffusion characteristics than the fin material. By selecting a liner with higher dopant diffusivity, the process enables abrupt dopant profiles to form at lower temperatures, resolving the contradiction between temperature and profile abruptness

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If a high thermal budget is used for dopant drive-in, then extensions are formed in the fins, but the manufacturing precision of the dopant profile deteriorates due to broad diffusion

Engineering Contradiction:
Improvedopant profile controlVSAvoidthermal energy consumption
Core Design Contradiction:
Manufacturing precisionVSLoss of energy

Solution Approach 1:

The liner acts as a mediator that enables precise dopant profile control at lower thermal energy consumption. Its higher diffusivity allows dopants to reach the fin and form abrupt extensions without the excessive thermal energy that would cause broad, imprecise diffusion profiles

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively forms bottom extensions with an abrupt dopant profile and a concave profile that curves inward at the vertical fin channel, improving the precision and reducing thermal budget requirements in VTFET device fabrication.

Implementation Method 1

the liner has a higher diffusivity for dopants than the fins... annealing the wafer to diffuse the dopants from the bottom source and drains, through the liner, into the base of the fins

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

annealing the wafer to diffuse the dopants... using a lower annealing temperature

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS11063147B2Forming bottom source and drain extension on vertical transport FET (VTFET)
Publication Date: 2021.07.13 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11063147B2 patent drawing
  • US11063147B2 patent drawing
  • US11063147B2 patent drawing

AI summary

Techniques for forming bottom source and drain extensions in VTFET devices are provided. In one aspect, a method of forming a VTFET device includes: patterning fins in a wafer; forming a liner at a base of the fins having a higher diffusivity for dopants than the fins; forming sidewall spacers alongside an upper portion of the fins; forming bottom source/drains on the liner at the base of the fins including the dopants; annealing the wafer to diffuse the dopants from the bottom source/drains, through the liner, into the base of the fins to form bottom extensions; removing the sidewall spacers; forming bottom spacers on the bottom source/drains; forming gate stacks alongside the fins above the bottom spacers; forming top spacers above the gate stacks; and forming top source/drains above the top spacers at tops of the fins. A VTFET device is also provided.