Self-Aligned Bottom Spacer Epi Flow for VTFET Fin Uniformity
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Solution Overview
Problem
The challenge in semiconductor technology is to effectively form vertical transport field effect transistors (VTFETs) with a self-aligned bottom spacer and epitaxial regions that support efficient current flow and scaling in CMOS integrated circuits, as traditional methods struggle with stacking planar FETs and achieving uniform epitaxial shapes under fin channels.
Innovation Solution
A method involving the formation of fins over a substrate, deposition of sacrificial material, self-aligned spacers, removal of the sacrificial material to define openings, filling with bottom spacers, and lateral etching to create cavities for epitaxial growth, resulting in symmetric tapered epitaxial regions under twin-fin structures, which can be further patterned to create asymmetric epitaxial regions for single fin devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional methods are used to form bottom spacers and epitaxial regions, then the process complexity is reduced, but the uniformity and symmetry of epitaxial regions under fin channels deteriorates
Solution Approach 1:
The method performs preliminary actions by forming sacrificial material and self-aligned spacers before epitaxial growth. The sacrificial material is deposited and patterned first, then spacers are formed self-aligned to the fins, creating a template structure that guides subsequent cavity formation and epitaxial growth. This preliminary structuring ensures uniform epitaxial regions without requiring complex in-situ control during growth.
Solution Approach 2:
The patent introduces intermediary structures (sacrificial material and self-aligned spacers) that mediate between the fin formation and epitaxial growth steps. These intermediaries define the cavity boundaries and protect the fins during lateral etching, enabling precise control of epitaxial region geometry without direct complex control of the growth process itself.
2Measurement precision
If self-aligned spacers are formed to define openings under fins, then the alignment precision is improved, but the number of process steps increases
Solution Approach 1:
The self-aligned spacers utilize the fins themselves as alignment references. The spacers are deposited conformally on the fin sidewalls, automatically achieving precise alignment without requiring separate alignment steps or complex lithography. The structure serves its own alignment function, eliminating the need for additional alignment marks or reference features.
Solution Approach 2:
The method merges multiple functions into the self-aligned spacer structure: it serves as both the alignment reference and the protective mask during lateral etching, and also defines the boundaries for epitaxial growth. By combining these functions into a single self-aligned structure, the patent reduces the need for separate process steps while maintaining high alignment precision.
3Manufacturing precision
If lateral etching is used to create cavities under fins, then the symmetry of epitaxial regions is improved, but the etching uniformity requirements increase
Solution Approach 1:
The self-aligned spacers provide local protection during lateral etching, creating zones of different etching resistance. The spacers protect the fin regions while allowing etching in the cavity areas, ensuring that the etch front progresses uniformly only where needed. This local differentiation of etching behavior ensures symmetric cavity formation without requiring extreme uniformity across the entire structure.
Solution Approach 2:
The lateral etching is performed after the self-aligned spacers are already in place, serving as a preliminary action that defines cavity boundaries before epitaxial growth. The spacers are formed in advance to establish the exact geometry needed, and the etching simply follows this pre-defined template, reducing the stringency of uniformity requirements during the etching step itself.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of VTFETs with uniform bottom spacers and epitaxial regions that enhance current flow and scalability, addressing the challenges of stacking and epitaxial shape uniformity, and supports the development of next-generation CMOS building blocks.
Implementation Method 1
filling the cavities with an epitaxial material such that epitaxial regions are defined each having a symmetric tapered shape under a twin-fin structure
Data Source
AI summary
A method is presented for forming a vertical transport field effect transistor (VTFET). The method includes forming a plurality of fins over a substrate, depositing a sacrificial material adjacent the plurality of fins, forming self-aligned spacers adjacent the plurality of fins, removing the sacrificial material to define openings under the self-aligned spacers, filling the openings with bottom spacers, depositing an interlayer dielectric (ILD) after patterning, laterally etching the substrate such that bottom surfaces of the plurality of fins are exposed, the lateral etching defining cavities within the substrate, and filling the cavities with an epitaxial material such that epitaxial regions are defined each having a symmetric tapered shape under a twin-fin structure. The single fin device can be formed through additional patterning and bottom epi under the single fin device that has an asymmetric tapered shape.