Semiconductor Wafer Alignment Using Dual-Region Marks
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Solution Overview
Problem
Existing semiconductor manufacturing processes face challenges in precise process control, particularly in aligning and exposing semiconductor wafers efficiently, which affects productivity and integration density.
Innovation Solution
The implementation of a processing apparatus with a detection module to identify and align alignment marks on both the active and edge regions of the semiconductor wafer, allowing for precise positioning and reduced exposure time, thereby increasing the number of gross dies and reducing processing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If alignment marks are only formed in the active region, then the active region area is maximized, but the alignment precision and process control are insufficient
Solution Approach 1:
The wafer is divided into two functional regions: an active region containing alignment marks for precision alignment, and an edge region containing alignment marks for process control. This segmentation allows each region to serve its specific purpose without interfering with the other, resolving the contradiction between maximizing active region area and achieving sufficient alignment precision.
2Manufacturing precision
If exposure time is increased to improve alignment accuracy, then alignment precision improves, but productivity decreases
Solution Approach 1:
Alignment marks are pre-formed in both the active and edge regions before the exposure process. The detection module uses these pre-positioned marks to quickly determine wafer position and orientation, eliminating the need for time-consuming alignment adjustments during exposure. This preliminary preparation enables fast alignment while maintaining high precision.
Solution Approach 2:
The detection module provides real-time feedback on wafer alignment by detecting the positions of alignment marks in both regions. This feedback allows the system to make precise, rapid adjustments to achieve accurate alignment without requiring extended exposure times, thereby maintaining both precision and productivity.
3Manufacturing precision
If more alignment marks are formed on the wafer, then alignment accuracy improves, but the number of gross dies decreases
Solution Approach 1:
Different regions of the wafer are assigned different qualities and functions: the active region contains alignment marks optimized for alignment accuracy, while the edge region contains alignment marks optimized for process control. This local differentiation allows the system to achieve high alignment accuracy using only the necessary minimum number of marks in the active region, maximizing the number of gross dies while maintaining precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the alignment process, increases the number of semiconductor devices per wafer, and reduces the time needed for exposure adjustments, leading to improved productivity and integration density.
Implementation Method 1
receiving the detection signal reflected from at least one of the first alignment mark and the second alignment mark
Data Source
AI summary
A method for aligning a semiconductor wafer is provided. The method includes providing the semiconductor wafer having two alignment marks formed on an active region or on an edge region of the semiconductor wafer. An included angle that is formed between the two alignment marks in a circumferential direction of the semiconductor wafer is between about 12 degrees and about 36 degrees. The method further includes receiving the detection signal reflected from at least one of the first alignment mark and the second alignment mark. The method also includes determining a parameter by a control system based on the received detection signal and moving the semiconductor wafer according to the parameter.