Semiconductor Wafer Apertures for Secondary Die Integration

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Solution Overview

Problem

Conventional packaging techniques for miniaturized semiconductor components, such as MEMS transducers and ICs, face challenges in efficiently supporting and integrating multiple components within a single package, particularly in achieving precise alignment and secure bonding during wafer-level processing, which affects handling, assembly, and protection from environmental factors.

Innovation Solution

The development of semiconductor wafers with apertures extending through the material, allowing for the secure placement and bonding of secondary dies within these apertures using adhesive materials, enabling efficient integration of multiple components, such as MEMS transducers and ICs, within a single substrate, facilitating wafer-level packaging and reducing the complexity of assembly processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional packaging techniques are used for miniaturized semiconductor components, then individual component packaging is achieved, but assembly complexity and processing time increase

Engineering Contradiction:
Improvepackaging efficiencyVSAvoidassembly complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple component packaging operations into a single wafer-level process. Multiple secondary dies are integrated into a single package substrate simultaneously, eliminating the need for separate assembly steps for each component. This combining approach directly resolves the contradiction by improving productivity through batch processing while reducing assembly complexity through integrated fabrication.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs preliminary integration of multiple secondary dies onto the package substrate before final assembly. By pre-positioning and bonding multiple components during wafer fabrication rather than during final assembly, the process achieves higher productivity through parallel processing and reduces assembly complexity by eliminating subsequent alignment and bonding operations.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If multiple components are integrated within a single package, then space utilization improves, but alignment precision requirements increase

Engineering Contradiction:
Improvepackage area utilizationVSAvoidalignment precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent performs preliminary positioning of multiple secondary dies onto the package substrate during wafer fabrication. By pre-aligning components using wafer-level registration techniques before final dicing and assembly, the process achieves efficient space utilization while maintaining alignment precision through controlled fabrication processes rather than post-fabrication adjustment.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces mechanical alignment and bonding operations with wafer-level fabrication processes. Instead of using mechanical pick-and-place equipment for precise positioning, the method uses photolithographic alignment and direct bonding techniques that achieve higher precision through process control, thereby enabling dense component integration without compromising alignment accuracy.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Loss of time

If wafer-level processing is used for multiple components, then processing time is reduced, but handling and bonding difficulty increase

Engineering Contradiction:
Improveprocessing timeVSAvoidhandling ease
Core Design Contradiction:
Loss of timeVSEase of manufacture

Solution Approach 1:

The patent combines multiple handling and bonding operations into single wafer-level processes. By processing multiple secondary dies simultaneously on the wafer substrate through integrated fabrication steps, the method reduces total processing time while simplifying handling through unified manipulation of the entire wafer rather than individual components.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent uses the wafer substrate as an intermediary carrier that simplifies handling of multiple secondary dies. The wafer acts as a unified platform that enables simultaneous manipulation, positioning, and bonding of multiple components, thereby reducing processing time while maintaining ease of manufacture through standardized wafer handling techniques rather than complex individual component manipulation.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If secondary dies are securely bonded within apertures, then component stability improves, but adhesive material requirements increase

Engineering Contradiction:
Improvecomponent stabilityVSAvoidadhesive material quantity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts the bonding function to occur primarily at the aperture edges and interfaces rather than requiring extensive adhesive material filling. By designing the aperture geometry and bonding process to achieve secure attachment at critical interfaces, the method ensures component stability while minimizing the quantity of adhesive material required, thereby resolving the contradiction between reliability and material consumption.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the effective integration and secure support of multiple components within a single package, enhancing handling and assembly efficiency while protecting against mechanical damage and environmental interference, and simplifying the packaging process by enabling wafer-level processing before dicing.

Implementation Method 1

The secondary die can be considered to comprise a structure which supports or defines one or more components—including electrical and/or mechanical components... The adhesive material may comprise e.g. a polymer or epoxy type material and is preferably a hardenable or settable material which may be applied in liquid form and which, when hardened, serves to secure the secondary die within the aperture by providing a bonding material between the secondary die and the side walls of the aperture

Methodology Applied
Scientific EffectAdhesive bonding: Adhesive

Data Source

PatentUS11736866B2Semiconductor structures
Publication Date: 2023.08.22 CIRRUS LOGIC INC
  • US11736866B2 patent drawing
  • US11736866B2 patent drawing
  • US11736866B2 patent drawing

AI summary

The present application relates to structures for supporting mechanical, electrical and/or electromechanical components, devices and/or systems and to methods of fabricating such structures. The application describes a primary die comprising an aperture extending through the die. The aperture is suitable for receiving a secondary die. A secondary die may be provided within the aperture of the primary die.