Wafer Assembly With Conductive Posts for Detachable Chip Testing

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Solution Overview

Problem

Existing semiconductor chip production methods lack simplicity and efficiency in testing semiconductor chips, particularly in establishing reliable electrical contacts for both flip-chip and vertical configurations, and in easily detachable connections for post-processing.

Innovation Solution

A wafer assembly with semiconductor chips featuring first and second main faces, electrically conducting posts in contact with these faces, and an insulating sacrificial layer allows for easy electrical contacting and subsequent detachment, utilizing materials like transparent conductive oxides and metals for the posts and sacrificial layers to facilitate testing and post-processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If conventional semiconductor chip production methods are used, then manufacturing process is established, but testing simplicity and efficiency are insufficient

Engineering Contradiction:
Improvetesting simplicityVSAvoidproduction efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The wafer assembly is segmented into multiple semiconductor chips arranged in a grid pattern, allowing individual testing and processing. Each chip can be independently contacted through the conducting posts while maintaining the integrity of the overall wafer structure during manufacturing processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Electrically conducting posts serve as intermediary elements between the semiconductor chips and external testing equipment. These posts enable simple electrical contacting for testing while maintaining mechanical stability, resolving the contradiction between testing simplicity and production efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If electrical contacts are established for testing, then chip functionality can be verified, but reliable contacting for both flip-chip and vertical configurations is difficult

Engineering Contradiction:
Improveelectrical contact reliabilityVSAvoidchip configuration adaptability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The electrically conducting posts are designed to serve multiple functions: they provide electrical contact for both flip-chip and vertical chip configurations, serve as mechanical support structures, and enable detachable connections for post-processing. This universal design resolves the contradiction between contact reliability and configuration adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The wafer assembly allows dynamic reconfiguration of chip orientations (flip-chip or vertical) while maintaining reliable electrical contact through the same conducting post structure. The system adapts to different chip configurations without requiring separate contact mechanisms.

Inventive Principle:
Principle #15Dynamics

3Stability of the object's composition

If permanent electrical contacts are made, then stable connection is achieved, but easy detachment for post-processing is lost

Engineering Contradiction:
Improveconnection stabilityVSAvoiddetachment ease
Core Design Contradiction:
Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The electrically conducting posts are designed with predetermined breakage layers or detachable connection mechanisms that allow easy separation after testing. The preliminary design enables stable connection during testing while facilitating subsequent detachment for post-processing operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The wafer assembly structure allows the sacrificial or temporary components (such as the wafer substrate or bonding layers) to be discarded after serving their purpose during testing, while the semiconductor chips and conducting posts are recovered for further processing or assembly.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS20240096681A1Wafer assembly and method for producing a plurality of semiconductor chips
Publication Date: 2024.03.21 AMS OSRAM INT GMBH
  • US20240096681A1 patent drawing
  • US20240096681A1 patent drawing
  • US20240096681A1 patent drawing

AI summary

Embodiments provide a wafer assembly including a plurality of semiconductor chips, wherein each semiconductor chip has a first main face and a second main face opposite the first main face, and wherein a first electrical contact is disposed on the second main face, a plurality of electrically conducting posts, wherein each first electrical contact is in direct contact with an electrically conducting post, and an electrically insulating sacrificial layer having passages in which the electrically conducting posts are disposed.