Semiconductor Wafer Back Electrode Groove Embedding

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Solution Overview

Problem

The increase in drain electrode thickness on semiconductor chips to reduce ON resistance leads to wafer warping during manufacturing, affecting yield and process execution.

Innovation Solution

Forming grooves in the semiconductor wafer's back surface to embed the back electrode, exposing the wafer surface and maintaining electrode thickness, which reduces warping and improves yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the film thickness of the drain electrode is increased to reduce ON resistance, then the ON resistance decreases, but the semiconductor wafer becomes warped during manufacturing

Engineering Contradiction:
ImproveON resistanceVSAvoidwafer flatness
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The drain electrode is segmented into two distinct parts: a thick electrode portion embedded in the groove that provides low ON resistance, and a thin surface portion that covers the back surface to maintain wafer flatness. This segmentation allows each part to fulfill its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The drain electrode structure transitions from a single-layer planar configuration to a three-dimensional structure with vertical depth (groove embedding) and surface coverage. This dimensional change enables the thick electrode to be positioned in the groove while the thin surface portion maintains wafer flatness, resolving the contradiction between low resistance and wafer stability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the film thickness of the drain electrode is increased to reduce ON resistance, then the ON resistance decreases, but the manufacturing yield deteriorates due to wafer warping

Engineering Contradiction:
ImproveON resistanceVSAvoidmanufacturing yield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The drain electrode is segmented into a thick embedded portion for low resistance and a thin surface portion for manufacturing stability. This segmentation enables the wafer to maintain flatness during manufacturing processes, improving yield while still achieving low ON resistance through the thick electrode portion.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the drain electrode have different thicknesses optimized for different functions: the groove-embedded region has large thickness for low resistance, while the back-surface region has small thickness for manufacturing stability. This local quality differentiation resolves the contradiction between performance and manufacturability.

Inventive Principle:
Principle #3Local quality

3Reliability

If the film thickness of the drain electrode is increased to reduce ON resistance, then the ON resistance decreases, but the process execution becomes difficult due to wafer warping

Engineering Contradiction:
ImproveON resistanceVSAvoidprocess execution
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The drain electrode is divided into a thick embedded portion and a thin surface portion. This segmentation allows subsequent manufacturing processes to be executed on a flat wafer surface, making process execution easier while maintaining low ON resistance through the thick electrode portion.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The thickness parameter of the drain electrode is changed spatially: large thickness in the groove region for low resistance, and small thickness on the surface for ease of manufacturing. This parameter differentiation enables both low ON resistance and easy process execution.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10546952B2Semiconductor device and manufacturing method thereof
Publication Date: 2020.01.28 RENESAS ELECTRONICS CORP
  • US10546952B2 patent drawing
  • US10546952B2 patent drawing
  • US10546952B2 patent drawing

AI summary

The present invention provides a method of manufacturing a semiconductor device to improve the manufacturing yield of the semiconductor device. The manufacturing method includes the steps of: forming a groove extending in a first direction (y direction) across a first power transistor formation region and a second power transistor formation region, in a back surface of a semiconductor wafer; filling the groove with a conductor film by forming the conductor film on the back surface in which the groove is formed; and exposing the back surface of the semiconductor wafer by removing a portion of the conductor film.