Wafer Back Side Recess Formation for Handling Rigidity
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Solution Overview
Problem
The challenge in semiconductor wafer processing is the difficulty in handling and processing thin wafers with reduced thickness, which leads to cracking and reduced yield, especially when transitioning between steps such as forming a rewiring layer on the back side of the wafer.
Innovation Solution
A method involving electrode embedding, back side recess formation by grinding and etching, and rewiring layer formation on the exposed metal electrodes, where the back side of the wafer is recessed to reduce thickness only in the device area while maintaining the peripheral area's original thickness, ensuring the wafer's rigidity and facilitating safe handling and processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the thickness of the wafer is reduced in the device forming area to achieve smaller device size, then the size and thickness of the semiconductor package are reduced, but the wafer becomes difficult to handle and cracks easily during processing
Solution Approach 1:
The wafer structure is designed with non-uniform thickness: the device forming area is thinned to the target thickness while the peripheral area maintains the original thicker structure. This local differentiation allows the device area to achieve size reduction while the peripheral rim provides mechanical strength for handling during processing operations.
Solution Approach 2:
The wafer is functionally segmented into two regions with different thickness characteristics: the device forming area (thinned) and the peripheral area (original thickness). This segmentation enables each region to serve its specific purpose - the thinned area for device miniaturization and the thicker peripheral area for structural support during manufacturing operations.
2Productivity
If the thickness of the wafer is reduced to achieve smaller device size, then packaging density increases, but cracking occurs easily causing reduction in yield
Solution Approach 1:
The wafer is designed with localized thickness reduction only in the device forming area while maintaining original thickness in the peripheral area. This creates a structural gradient where the thinned device region achieves high packaging density while the thicker peripheral rim prevents wafer cracking during processing, thereby maintaining high yield.
3Length of moving object
If the wafer thickness is greatly reduced to reduce size, then device miniaturization is achieved, but the wafer becomes fragile and difficult to process between steps
Solution Approach 1:
The wafer structure implements local thickness differentiation where the device forming area is thinned to achieve miniaturization while the peripheral area retains original thickness to provide mechanical strength. This local quality variation resolves the contradiction between achieving thin dimensions and maintaining structural integrity.
Solution Approach 2:
The thickness reduction is performed selectively and preliminarily in the device forming area before subsequent processing steps. By pre-thinning only the necessary device region while leaving the peripheral support structure intact, the wafer is prepared for device miniaturization while maintaining sufficient strength for handling during subsequent manufacturing operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for reliable formation of the rewiring layer on the back side of the wafer, improving handling and productivity by preventing cracking and enhancing yield during the separation of individual semiconductor chips.
Implementation Method 1
a back side recess forming step of reducing the thickness of the device forming area from the back side of the wafer to form a recess on the back side of the wafer
Implementation Method 2
back side recess forming step of reducing the thickness of the device forming area from the back side of the wafer
Data Source
AI summary
A wafer processing method having a step of reducing the thickness of a wafer in only a device forming area where semiconductor chips are formed by grinding and etching the back side of the wafer to thereby form a recess on the back side of the wafer. At the same time, an annular projection is formed around the recess to thereby ensure the rigidity of the wafer. Accordingly, handling in shifting the wafer from the back side recess forming step to a subsequent step of forming a back side rewiring layer can be performed safely and easily.