Wafer Back-Side Doping for Uniform RF Plasma Processing
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Solution Overview
Problem
Semiconductor wafer processing techniques, particularly plasma-based processes, face challenges in achieving uniformity due to high resistivity of substrates like silicon and gallium arsenide, leading to variations in RF coupling and resulting in non-uniform etch and deposition rates, which affect device performance and yield.
Innovation Solution
Doping the back side of high resistivity semiconductor wafers with a doped layer to increase conductivity, thereby improving RF coupling and achieving uniformity in plasma-based processes such as PECVD and reactive ion etching by facilitating consistent etch and deposition rates across the wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high resistivity wafers are used for semiconductor processing, then substrate quality and device performance are improved, but plasma process uniformity deteriorates due to variations in RF coupling and etch/deposition rates
Solution Approach 1:
The patent changes the electrical conductivity parameter of the wafer back side by introducing a doped layer with lower resistivity. This parameter modification enables better RF coupling during plasma processes, thereby improving process uniformity without compromising the high resistivity requirement of the front side for device performance
Solution Approach 2:
The doped layer acts as an intermediary between the plasma processing system and the high resistivity substrate. It provides the necessary electrical conductivity for effective RF coupling and plasma uniformity, while the front side maintains its high resistivity characteristics for optimal device performance
2Manufacturing precision
If doping is applied to improve RF coupling, then plasma process uniformity is improved, but wafer structure complexity increases
Solution Approach 1:
The patent addresses plasma uniformity issues by acting on the back side of the wafer, which is the opposite dimension from the front side processing. This dimensional approach allows modification of RF coupling properties without interfering with front side device structures
Solution Approach 2:
The wafer is segmented into functionally distinct regions: the front side maintains high resistivity for device performance, while the back side receives a doped layer for plasma process uniformity. This segmentation allows each side to be optimized for its specific function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The doped layer significantly reduces relative standard deviation of thickness values by at least a factor of two, enhancing process uniformity and reducing variations caused by wafer handling features, resulting in improved device performance and yield.
Implementation Method 1
doping one side of the high resistivity wafer to form a doped layer having an increased conductivity on the one side of the high resistivity wafer
Implementation Method 2
performing a plasma-based process on the other side of the high resistivity wafer
Data Source
AI summary
Disclosed are systems and methods for improving front-side process uniformity by back-side doping. In some implementations, a highly conductive doped layer can be formed on the back side of a semiconductor wafer prior to certain process steps such as plasma-based processes. Presence of such a back-side doped layer reduces variations in, for example, thickness of a deposited and/or etched layer resulting from the plasma-based processes. Such reduction in thickness variations can result from reduced variation in radio-frequency (RF) coupling during the plasma-based processes.