Wafer Backside Polishing Guided by Piezoelectric Topography Sensing

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Solution Overview

Problem

Existing semiconductor manufacturing processes result in foreign objects, film residue, and uneven films on the backside of wafers, leading to defocusing issues during exposure processes, which affect imaging quality and pattern profiles.

Innovation Solution

A system and method utilizing a vacuum stage with piezoelectric elements to detect deformations on the wafer backside, transmitting data to a polishing device for customized pressure-based polishing to flatten the surface, removing contaminants and defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional manufacturing processes (etching, deposition, diffusion) are performed on wafers, then semiconductor devices are produced, but foreign objects, film residue, and uneven films remain on the backside of wafers causing defocusing issues

Engineering Contradiction:
Improvesemiconductor device productionVSAvoidwafer flatness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The system performs preliminary detection of wafer backside topography using piezoelectric elements before the polishing step. This allows the polishing process to be precisely targeted and controlled, removing contaminants and flattening the surface without requiring excessive material removal, thereby resolving the contradiction between maintaining productivity and improving manufacturing precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The polishing apparatus applies localized polishing pressure to specific regions of the wafer backside based on detected topography variations. By concentrating polishing action only where needed (at locations with foreign objects, film residue, or unevenness), the system achieves high flatness improvement while minimizing overall processing time and material removal, thus resolving the contradiction between productivity and manufacturing precision.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If fixed pressure polishing is applied to wafer backside, then flattening is achieved, but over-polishing may occur causing wafer damage

Engineering Contradiction:
Improvewafer flatnessVSAvoidwafer integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The system incorporates real-time feedback through piezoelectric elements that detect wafer backside topography during the polishing process. The detected deformation data is fed back to control the polishing pressure dynamically, allowing the system to stop polishing in regions that have achieved sufficient flatness and avoid applying excessive pressure that could cause wafer damage, thus resolving the contradiction between manufacturing precision and reliability.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The polishing pressure is made dynamic rather than fixed, adjusting in real-time based on the detected wafer topography. The system applies higher pressure to regions with greater deformations and reduces or stops pressure in regions that are already sufficiently flat, preventing over-polishing and wafer damage while achieving the required flatness, thereby resolving the contradiction between manufacturing precision and reliability.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The system improves the flatness of the wafer backside, reducing defocusing issues and enhancing the performance of exposure processes by maintaining wafer integrity and preventing over-polishing.

Implementation Method 1

The stage can include piezoelectric elements configured to sense a topography of the backside of the wafer. For example, the piezoelectric elements can be configured to detect deformations on the backside of the wafer.

Methodology Applied
Scientific EffectPiezoelectric effect: Piezoelectric Effect

Implementation Method 2

placing the wafer on a vacuum stage

Methodology Applied
Scientific EffectVacuum: Vacuum

Data Source

PatentUS20250372420A1Systems for manufacturing a semiconductor device and relevant methods
Publication Date: 2025.12.04 NAN YA TECH
  • US20250372420A1 patent drawing
  • US20250372420A1 patent drawing
  • US20250372420A1 patent drawing

AI summary

A system and a method for manufacturing a semiconductor device are provided. The system includes a processor, a stage for supporting a first wafer, and a polishing device. The stage is configured to sense characteristic data of a first surface of the first wafer, wherein the stage is electrically coupled to the processor and configured to transmit the sensed characteristic data of the first surface of the first wafer to the processor. The polishing device is electrically coupled to the processor and configured to remove foreign objects from the first surface of the first wafer based on the sensed characteristic data.