Wafer-Based 3D Multi-Chip Module Design
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Solution Overview
Problem
Conventional high density electronic packages face limitations in 2D space utilization, leading to restricted chip density and increased thickness, cost, and processing time due to the relative placement and orientation of electronic devices on a single mounting surface.
Innovation Solution
The technique involves encapsulating electronic modules on two opposing sides of a wafer-based multi-chip module, allowing for the formation of circuit layers on both sides and using a mold material to surround the modules, which mitigates undesired bowing or flexing caused by thermal expansion, thereby improving space utilization and reducing the need for module stacking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If electronic modules are placed on a single 2D mounting surface, then the placement and orientation is simple, but the chip density is limited and package thickness increases
Solution Approach 1:
The patent transitions from conventional 2D mounting surface placement to 3D integration by utilizing both opposing sides of the wafer substrate. Electronic modules are mounted on first and second opposing surfaces of the substrate, effectively adding a dimensional aspect to the integration architecture. This allows doubling the functional density without proportionally increasing package thickness, as the modules are distributed across two surfaces rather than stacked vertically or confined to a single plane.
2Adaptability or versatility
If multiple modules are stacked to achieve design requirements, then functionality is enhanced, but processing time and cost increase
Solution Approach 1:
The patent combines multiple electronic modules into a single integrated wafer-based package structure rather than stacking separate modules. The modules are mounted on opposing surfaces of the same substrate and interconnected through the substrate, creating a unified single-package solution. This merging approach eliminates the need for multiple discrete stacking operations, reducing processing steps, time, and associated costs while achieving the required functionality within one package.
3Quantity of substance
If electronic modules are densely packed on a mounting surface, then space utilization improves, but thermal expansion causes bowing or flexing
Solution Approach 1:
The patent employs asymmetric distribution of electronic modules across the two opposing surfaces of the substrate. Rather than uniform symmetric placement, modules are strategically positioned on each surface to balance thermal mass and expansion characteristics. This asymmetric arrangement, combined with the dual-sided mounting architecture, helps distribute thermal stresses more evenly throughout the substrate, reducing the likelihood of bowing or flexing that would occur with dense single-sided packing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in reduced package thickness, cost, and processing time while enhancing space utilization by integrating multiple electronic modules in a single three-dimensional MCM, maintaining module performance and preventing unwanted deformation.
Implementation Method 1
the electronic modules increase or decrease in size during certain fabrication processes (e.g., curing at high temperatures) due to further mismatch with the substrate material. In turn, this change or delta in size can cause undesired bowing or flexing in a resultant multi-chip module device
Data Source
AI summary
Techniques for constructing a multi-chip module semiconductor device are provided herein. The techniques include placing electronic modules on a first surface and a second surface, with electrical connections for the electronic modules being proximate to respectively mounted surfaces, disposing a mold material on one of the mounting surfaces to substantially surround corresponding electronic modules, orienting the mounting surface without the mold material disposed thereon, relative to the mounting surface with the mold material disposed thereon to cause the mold material to substantially surround each electronic module while maintaining a minimum distance between the electronic modules mounted on each mounting surface. The techniques further include removing the mounting surfaces from the mold compound to yield a multi-chip semiconductor device.