Wafer Bevel Etching Mask for CMP Slurry Flow

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Solution Overview

Problem

In semiconductor manufacturing, the non-uniform thickness of material layers around the wafer bevel region leads to defects and inefficiencies in chemical mechanical polishing (CMP) processes, affecting the yield and performance of subsequent processes due to the obstruction of the CMP slurry and uneven stress distribution.

Innovation Solution

A wafer bevel etching apparatus with a wafer-protecting mask that shields the central region while exposing parts of the bevel region for etching, ensuring that only the thicker areas are thinned, thereby preventing damage to critical marks and improving CMP process efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a CMP process is performed on the wafer, then the wafer surface can be polished for planarity, but the thick film on the wafer bevel obstructs the CMP slurry and affects the polishing stress distribution

Engineering Contradiction:
Improvewafer surface planarityVSAvoidCMP slurry obstruction
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by performing a wafer bevel etching process before the CMP process. This pre-etching step removes the excessive material on the wafer bevel, thereby eliminating the obstruction to CMP slurry and ensuring uniform polishing stress distribution during the subsequent CMP process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the wafer into different regions (central region and bevel region) and applies different processing approaches. The bevel region undergoes selective etching to remove excess material, while the central region is protected, allowing the CMP process to focus on polishing the exposed areas without obstruction.

Inventive Principle:
Principle #1Segmentation

2Productivity

If the wafer bevel region is etched to reduce thickness, then the CMP process performance is improved, but the central region and critical marks may be damaged

Engineering Contradiction:
ImproveCMP process efficiencyVSAvoidwafer mark damage
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by using a mask structure that provides different levels of protection to different regions of the wafer. The mask has a first region that fully protects the central area and critical marks, while a second region allows selective etching of the bevel area. This localized differentiation enables the bevel to be thinned for improved CMP performance while the central region and marks remain protected from damage.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If the material layer thickness is reduced uniformly across the wafer, then the edge topography is controlled, but the thicker film on the wafer bevel cannot be effectively addressed

Engineering Contradiction:
Improveedge topography controlVSAvoidbevel thickness variation
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent applies local quality by implementing selective etching that targets only the bevel region with different etching conditions compared to the central region. The mask structure enables the bevel area to be thinned preferentially, addressing the thickness variation specific to the edge topography while maintaining uniformity in the central region where devices are located.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9613796B2Method of flattening a wafer
Publication Date: 2017.04.04 UNITED MICROELECTRONICS CORP
  • US9613796B2 patent drawing
  • US9613796B2 patent drawing
  • US9613796B2 patent drawing

AI summary

The wafer bevel etching apparatus of the present invention includes a wafer-protecting mask to cover parts of a wafer. A central region and a wafer bevel region surrounding the central region are defined on the wafer. The wafer-protecting mask includes a center sheltering region and at least one wafer bevel sheltering region. The center sheltering region can completely shelter the central region of the wafer, and the wafer bevel sheltering region extends from the outside edge of the center sheltering region, shelters parts of the wafer bevel region, and exposes the other parts of the wafer bevel region.