Wafer Biasing Circuit Topology for Low-Ringing Plasma Pulses
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Solution Overview
Problem
Existing high voltage pulse generators face challenges in producing high voltage pulses with fast rise times and variable pulse widths, often resulting in slow switching and inefficient energy transfer due to high stray inductance and capacitance, leading to ringing and voltage overshoots.
Innovation Solution
A pulse generator system with a driver stage having low stray inductance, a transformer stage for voltage amplification, and a rectifier stage with low stray inductance, coupled with a sink stage to manage energy storage and release, allowing for fast switching and reduced ringing through pre-pulse techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional high voltage pulse generators are used, then voltage amplification is achieved, but stray inductance and capacitance cause slow switching and ringing
Solution Approach 1:
The pulse generator is divided into multiple independent stages (driver stage, transformer stage, rectifier stage, sink stage), each optimized for its specific function. This segmentation allows each stage to contribute to overall performance without compromising the others, enabling fast switching while maintaining waveform quality through minimized stray inductance and capacitance in each segment.
Solution Approach 2:
The driver stage prepares the signal in advance by generating a clean, fast-rising input waveform before it reaches the transformer stage. This preliminary action ensures that the subsequent stages receive an optimized signal, reducing the impact of stray inductance and capacitance on the final output waveform quality and switching speed.
2Manufacturing precision
If fast rise times are achieved, then pulse width control is improved, but energy transfer efficiency decreases due to ringing
Solution Approach 1:
The sink stage is specifically designed to capture and dissipate the ringing energy that naturally occurs during fast switching transitions. By providing a dedicated path for this energy, the system converts what would be wasted energy into a controlled dissipation process, maintaining both fast rise times for precise pulse width control and high energy transfer efficiency to the load.
3Strength
If voltage amplification is increased, then high voltage output is achieved, but stray inductance causes voltage overshoots
Solution Approach 1:
Each stage of the pulse generator is designed with specific local optimizations: the driver stage uses low-inductance layout, the transformer stage uses optimized winding configurations, and the rectifier stage uses low-stray-inductance components. This local quality approach ensures that voltage amplification is achieved while minimizing stray inductance at each critical point, preventing voltage overshoots even at high output voltages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system achieves clean square waveforms with negligible ringing and overshoots, enabling efficient high voltage pulse generation with fast rise times and variable pulse widths, improving energy transfer efficiency.
Implementation Method 1
The transformer stage may be coupled with the driver stage such as, for example, through a balance stage and may include one or more transformers
Implementation Method 2
The rectifier stage may be coupled with the transformer stage and may have a stray inductance less than 1,000 nH
Data Source
AI summary
Some embodiments include methods and systems for wafer biasing in a plasma chamber. A method, for example, may include: generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source; coupling, capacitively, the one or more of low and medium voltages to the wafer; and pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer.