Wafer-Bonded Epitaxial Channel Integration for Dense ICs

The patent applies segmentation by dividing the semiconductor processing into multiple separate wafers (first wafer with active regions, second wafer with gate structures, third wafer with interconnects) that are processed independently and then bonded together. This segmentation allows each wafer to be optimized separately, reducing the processing complexity that would otherwise result from implementing aggressive design rules on a single integrated wafer.

The patent transitions from traditional planar processing to three-dimensional stacking by bonding multiple wafers together in the vertical dimension. This dimensional change allows increased device density without proportionally increasing processing complexity, as the complexity is distributed across multiple simpler processing steps on separate wafers.

By segmenting the device structure into multiple separately processed wafers, each wafer can be manufactured with relaxed precision requirements. The first wafer contains larger feature active regions, the second wafer contains gate structures, and the third wafer contains interconnects. This segmentation allows each component to be manufactured with appropriate precision levels without requiring all features to meet the most stringent precision requirements simultaneously.

The patent uses dielectric layers and bonding interfaces as intermediaries between different feature size regimes. The dielectric layers provide isolation and spacing that allow larger feature sizes on the first wafer to coexist with smaller feature sizes on subsequent wafers, mediating the transition between different precision requirements.

Segmentation into multiple wafers allows different material systems to be used on each wafer independently. The first wafer can use silicon-based materials for active regions, the second wafer can use different semiconductor materials for gate structures, and the third wafer can use various conductive materials for interconnects. This segmentation removes the constraint that would otherwise require all materials to be compatible with a single processing sequence.

The bonding interface serves as a universal connection method that can join different material systems together. The dielectric-to-dielectric bonding approach is material-agnostic, allowing diverse material choices on different wafers to be integrated through a common bonding process, thereby achieving both processing simplicity and material flexibility.