Wafer Bonding Alignment Accuracy via Melted Material Layers

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Solution Overview

Problem

The existing methods for bonding semiconductor wafers suffer from alignment inaccuracies, leading to bonding shifts and adverse effects, which compromise the electrical and thermal properties of the resulting semiconductor structures.

Innovation Solution

A method involving the formation of material layers on both wafers, which are aligned and then melted together during a heating process to enhance alignment accuracy, utilizing surface tension to improve the precision of metal layer alignment and reduce bonding shifts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional alignment and bonding processes are used between wafers, then the bonding process can be completed, but alignment accuracy is insufficient leading to bonding shifts

Engineering Contradiction:
Improvealignment accuracyVSAvoidbonding shift
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent utilizes the phase transition of the material layer from solid to liquid state through controlled heating. The material layer is heated to its melting point, transitions to liquid state, and then solidifies upon cooling. This phase transition enables the material to flow and self-align, significantly improving alignment accuracy between metal layers while preventing bonding shifts.

Inventive Principle:
Principle #36Phase transitions

Solution Approach 2:

The patent changes the temperature parameter of the material layer from room temperature to melting point temperature. By controlling the temperature parameter, the material layer transitions from a rigid solid state to a fluid liquid state, enabling self-alignment through flow and capillary forces, thereby resolving the alignment accuracy issue.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If heating process is applied to melt material layers, then alignment accuracy is improved, but process complexity increases

Engineering Contradiction:
Improvealignment accuracyVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The material layer serves itself by utilizing its own phase transition properties to achieve alignment. When heated to melting point, the material layer automatically flows and self-aligns through capillary forces and surface tension, eliminating the need for complex external alignment mechanisms or additional alignment steps.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The material layer is prepared in advance by forming it on the wafer surface before bonding. This preliminary preparation ensures that when heating is applied, the material is already in position and will self-align during the phase transition, simplifying the overall process by pre-positioning the alignment-critical component.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly improves the alignment accuracy between semiconductor wafers, reducing bonding shifts and enhancing the structural integrity and performance of the semiconductor devices by ensuring precise metal layer alignment and contact.

Implementation Method 1

a heating process is performed on the first material layer and the second material layer, such that the first material layer and the second material layer are melted into one another

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 2

utilizing surface tension to improve the precision of metal layer alignment

Methodology Applied
Scientific EffectSurface tension: Surface Tension

Data Source

PatentUS9754893B2Semiconductor structure and fabrication method thereof
Publication Date: 2017.09.05 SEMICON MFG INT (SHANGHAI) CORP
  • US9754893B2 patent drawing
  • US9754893B2 patent drawing
  • US9754893B2 patent drawing

AI summary

Semiconductor structure and fabrication methods are provided. The semiconductor structure includes a first wafer having a first metal layer therein and having a first material layer thereon, and a second wafer having a second metal layer therein and having a second material layer thereon. An alignment process and a bonding process are preformed between the first wafer and the second wafer, such that the first material layer and the second material layer are aligned and in contact with one another to provide a first alignment accuracy between the first metal layer and second metal layer. A heating process is performed on the first material layer and the second material layer to melt the first material layer and the second material layer to provide a second alignment accuracy between the first metal layer and second metal layer. The second alignment accuracy is greater than the first alignment accuracy.