Wafer Bonding Surface Preparation With CVD-CMP Cycling
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Solution Overview
Problem
The existing wafer bonding processes, such as fusion bonding, face challenges in achieving the required low surface roughness for successful bonding, particularly in silicon fusion bonding, where surface roughness needs to be less than 1 nanometer to prevent bonding voids and peeling issues.
Innovation Solution
The method involves alternating cycles of chemical vapor deposition (CVD) and chemical mechanical polishing (CMP) processes to reduce the surface roughness of wafers, with an additional CVD step after reaching a certain threshold to further refine the surface, ensuring a smooth and reliable bonding process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional fusion bonding is used without intermediate layers, then the bonding process is simple and direct, but the surface roughness requirement is extremely stringent (less than 1 nanometer)
Solution Approach 1:
The patent introduces an intermediate layer between the two wafers to be bonded. This intermediate layer acts as a mediator that compensates for surface roughness defects, allowing bonding to proceed even when the wafer surfaces do not meet the stringent less than 1 nanometer roughness requirement. The intermediate layer fills in surface irregularities and provides a smooth bonding interface, thus resolving the contradiction between process simplicity and surface precision requirements.
2Ease of manufacture
If CMP is used as the final process before bonding, then the grinding surface is achieved, but the surface roughness is high and does not meet the bonding requirement
Solution Approach 1:
The patent applies preliminary actions by depositing the intermediate layer before the final bonding step. This intermediate layer is deposited in advance to compensate for the high surface roughness that results from CMP processing. By performing this deposition action beforehand, the patent ensures that the surface roughness issue is addressed before bonding occurs, allowing the use of CMP as the final mechanical preparation step while still achieving the required bonding quality.
3Productivity
If high surface roughness is present before bonding, then the bonding process can proceed without additional processing, but bonding voids and sensing plate peeling issues occur
Solution Approach 1:
The intermediate layer serves as a mediator that prevents bonding defects such as voids and peeling. By introducing this layer, the patent maintains bonding process efficiency while significantly improving bonding quality and reliability. The intermediate layer fills surface irregularities that would otherwise cause void formation and adhesion failures, thus resolving the contradiction between productivity and reliability.
4Manufacturing precision
If multiple CVD and CMP cycles are performed, then the surface roughness is reduced to less than 0.5 nanometers, but the processing time and complexity increase
Solution Approach 1:
The patent performs multiple CVD and CMP cycles as preliminary actions before the final bonding step to achieve the target surface roughness of less than 0.5 nanometers. By completing these iterative refinement cycles in advance, the patent ensures that the surface is optimally prepared for bonding, achieving high precision while managing the time investment through systematic preliminary processing rather than extended bonding preparation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the root mean square (RMS) surface roughness to less than 0.5 nanometers, enhancing the bonding performance and yield by ensuring a strong and reliable bond, reducing the likelihood of peeling and bond failure.
Implementation Method 1
performing at least one chemical vapor deposition (CVD), and performing at least one chemical mechanical polishing (CMP)
Implementation Method 2
performing at least one chemical vapor deposition (CVD), and performing at least one chemical mechanical polishing (CMP)
Implementation Method 3
Direct bonding, or fusion bonding, is a popular wafer bonding process without any additional intermediate layers
Data Source
AI summary
Methods for improving wafer bonding performance are disclosed herein. In some embodiments, a method for bonding a pair of semiconductor substrates is disclosed. The method includes: processing at least one of the pair of semiconductor substrates, and bonding the pair of semiconductor substrates together. Each of the pair of semiconductor substrates is processed by: performing at least one chemical vapor deposition (CVD), and performing at least one chemical mechanical polishing (CMP). One of the at least one CVD is performed after all CMP performed before bonding.