Wafer Bonding Edge Trimming for Gap Reduction
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Solution Overview
Problem
In 3D-IC technology, ensuring complete adherence of bonding interfaces between wafers without gaps is crucial to prevent reduced bonding strength and cracking during the thinning process, which is challenging due to uneven wafer edges.
Innovation Solution
A method involving sequential bonding of wafers with first edge trimming from the bonding surface, followed by thinning, to remove uneven portions and enhance bonding strength, using techniques like chemical mechanical polishing and chemical etching, and potentially hybrid bonding with a dielectric material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If wafer edges are not trimmed before bonding, then the manufacturing process is simpler and faster, but gaps form at bonding interfaces reducing bonding strength
Solution Approach 1:
The patent applies preliminary action by performing edge trimming on wafers before the bonding process. Specifically, the method trims edges of wafers in a first wafer stack before bonding to a second wafer stack, removing uneven portions that would otherwise cause gaps at bonding interfaces. This preliminary preparation ensures complete adherence at bonding interfaces and improves bonding strength, while the trimming operation is integrated into the existing manufacturing flow to minimize added complexity.
2Reliability
If edge trimming is performed on all wafers, then bonding interface adherence is improved, but manufacturing time and process steps increase
Solution Approach 1:
The patent applies local quality by performing edge trimming selectively only on wafers that require it, rather than uniformly on all wafers. The method trims edges of wafers in the first wafer stack before bonding, targeting specific locations where gaps would form at bonding interfaces. This localized approach improves bonding interface adherence where needed while avoiding unnecessary processing steps on already-suitable wafers, thereby maintaining manufacturing efficiency.
3Reliability
If sequential bonding of multiple wafers is performed without intermediate trimming, then the process is faster, but gaps form reducing overall wafer stack reliability
Solution Approach 1:
The patent applies preliminary action by performing edge trimming on wafers in the first wafer stack before the bonding operation to the second wafer stack. This preliminary trimming removes uneven portions that would cause gaps at bonding interfaces, ensuring complete adherence and improving wafer stack reliability. The trimming step is integrated into the sequential bonding process, maintaining a systematic approach to multi-wafer assembly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the likelihood of gaps between bonding interfaces, thereby improving the bonding strength and reliability of the wafer stack, minimizing the risk of cracking and ensuring high integration and performance.
Implementation Method 1
performing first thinning by using chemical mechanical polishing
Implementation Method 2
performing second thinning by using chemical etching after the first thinning
Data Source
AI summary
A bonding structure and a method for manufacturing the same. First edge trimming is performed from the bonding surface of an n-th wafer in bonding the n-th wafer and an (n−1)th wafer, and a width of the first edge trimming is Wn. As n increases, the width of the first edge trimming is gradually increased. In the trimming, a portion that is not even at the edge of the n-th wafer can be removed. The bonding surface of the n-th wafer faces the bonding surface of the (n−1)-th wafer, so as to bond the n-th wafer and the (n−1)-th wafer. Afterwards the substrate of the n-th wafer is thinned, so as to form the (n−1)-th wafer stack. There is a reduced possibility that a gap exists between the bonding interfaces of the wafers, a bonding strength between the wafers is improved, and a risk of cracking is reduced.