Wafer Bonding Pad Structure for Thin Dielectric Heat Conduction
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Solution Overview
Problem
Current wafer-to-wafer bonding technologies face challenges in achieving efficient thermal conduction and reducing device thickness while maintaining effective electrical connections and thermal performance.
Innovation Solution
A bonding structure and method involving the formation of a thinner surface dielectric layer with planarization stop layers and bonding pads, which allows for improved thermal conduction and reduced device thickness through the use of conductive pads and bonding pads connected via direct or hybrid bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thicker dielectric layer is used in wafer bonding, then electrical insulation is improved, but thermal conduction deteriorates and device thickness increases
Solution Approach 1:
The dielectric layer is segmented into multiple thinner dielectric sub-layers separated by conductive intermediary layers. This segmentation allows each dielectric sub-layer to provide electrical insulation while the conductive layers provide thermal conduction paths, resolving the contradiction between electrical insulation and thermal conduction.
Solution Approach 2:
Conductive intermediary layers are introduced between dielectric layers to act as thermal conduction mediators. These intermediary layers have high thermal conductivity to conduct heat away from the bonding interface while the dielectric layers maintain electrical insulation, thus resolving the thermal conduction issue without compromising electrical insulation.
2Reliability
If a thicker dielectric layer is used, then electrical insulation is improved, but device thickness increases
Solution Approach 1:
The thick dielectric layer is divided into multiple thinner dielectric sub-layers with conductive layers in between. This segmentation reduces the overall thickness required to achieve the same electrical insulation performance, as the conductive layers are much thinner than equivalent thickness of dielectric material would be.
Solution Approach 2:
The bonding structure uses a composite arrangement of dielectric and conductive materials in alternating layers. This composite structure achieves the electrical insulation function of a thick dielectric layer while using significantly less total thickness, as the conductive layers contribute minimal thickness but enable thermal management that allows thinner overall design.
3Strength
If direct metal-to-metal bonding is used, then bonding strength is improved, but thermal conduction at the interface deteriorates
Solution Approach 1:
Conductive intermediary layers are introduced between the metal pads to act as thermal conduction mediators. These intermediary layers have high thermal conductivity to conduct heat away from the bonding interface, improving thermal conduction while the metal-to-metal bonding maintains the bonding strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances thermal performance and reduces device thickness by improving thermal conduction across the dielectric layers and maintaining effective electrical connections, thereby addressing the limitations of existing bonding technologies.
Implementation Method 1
In direct metal-to-metal bonding, two metal pads are pressed against each other at an elevated temperature, and the inter-diffusion of the metal pads causes the bonding of the metal pads.
Implementation Method 2
In fusion bonding, an oxide surface of a wafer is bonded to an oxide surface or a silicon surface of another wafer.
Implementation Method 3
In eutectic bonding, two eutectic materials are placed together, and a high pressure and a high temperature are applied. The eutectic materials are hence melted. When the melted eutectic materials solidify, the wafers bond together.
Data Source
AI summary
A device includes an interconnect structure over a substrate, multiple first conductive pads over and connected to the interconnect structure, a planarization stop layer extending over the sidewalls and top surfaces of the first conductive pads of the multiple first conductive pads, a surface dielectric layer extending over the planarization stop layer, and multiple first bonding pads within the surface dielectric layer and connected to the multiple first conductive pads.


