Wafer Surface Uniformity via Buffer Layer Polishing

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Solution Overview

Problem

The increasing complexity and density of semiconductor wafer patterns lead to poor uniformity of surface evenness, affecting electrical performance due to differences in pattern density, necessitating an improved method to enhance wafer surface uniformity.

Innovation Solution

A method involving a wafer with regions of different pattern densities, where a conductive layer is formed, a buffer layer is polished to expose it, and both layers are etched uniformly, followed by patterning to create contact pads, ensuring consistent surface evenness through controlled etching and polishing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional deposition methods are used on wafers with varying pattern densities, then the deposition process is simple and fast, but the surface evenness uniformity deteriorates

Engineering Contradiction:
Improvesurface evenness uniformityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A buffer layer is formed on the conductive layer before polishing, serving as a protective and uniformizing medium. This preliminary action ensures that the subsequent polishing process can effectively flatten the surface without damaging the underlying conductive layer, thereby improving surface evenness uniformity across regions with different pattern densities

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention employs a multi-step process with controlled etching rates where the etching rate of the conductive layer matches the etching rate of the buffer layer. This parameter matching ensures uniform material removal during etching, maintaining surface evenness across different pattern density regions while managing process complexity

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If regions with different pattern densities are processed uniformly, then the process is simple, but the material layer uniformity deteriorates

Engineering Contradiction:
Improvematerial layer uniformityVSAvoidprocessing ease
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The buffer layer is designed with specific properties that enable it to interact differently with polishing and etching processes in regions of varying pattern density. This local adaptation through material selection ensures uniform material layer formation across the entire wafer surface, compensating for pattern density variations without requiring region-specific processing steps

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If the conductive layer is directly patterned without buffer layer, then the process steps are reduced, but the surface evenness and electrical performance deteriorate

Engineering Contradiction:
Improvesurface evennessVSAvoidprocess efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The buffer layer acts as an intermediary between the conductive layer and the polishing/etching processes. It protects the conductive layer during processing, ensures uniform material removal, and maintains surface evenness. This intermediary layer enables precise surface control while the matched etching rates minimize additional process steps, balancing surface quality with process efficiency

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a highly uniform wafer surface, improving electrical performance by maintaining a consistent thickness and evenness of the conductive layer, which is essential for precise semiconductor fabrication.

Implementation Method 1

The buffer layer is polished until the conductive layer is exposed

Methodology Applied
Scientific EffectPolishing: Abrasion

Implementation Method 2

A portion of the conductive layer and the remaining buffer layer are etched away. The etching process has the same etching rate for the conductive layer and the remaining buffer layer

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS10276367B1Method for improving wafer surface uniformity
Publication Date: 2019.04.30 UNITED MICROELECTRONICS CORP
  • US10276367B1 patent drawing
  • US10276367B1 patent drawing
  • US10276367B1 patent drawing

AI summary

A method for improving wafer surface uniformity is disclosed. A wafer including a first region and a second region is provided. The first region and the second region have different pattern densities. A conductive layer is formed on the wafer. A buffer layer is then formed on the conductive layer. The buffer layer is polished until the conductive layer is exposed. A portion of the conductive layer and the remaining buffer layer are etched away.