Wafer Center Monitoring for Edge Ring Alignment Uniformity

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Solution Overview

Problem

The misalignment and tilting of wafer edge cover rings during semiconductor processing can lead to uneven film deposition and etch profiles, affecting die yield and quality in integrated circuits.

Innovation Solution

Implementing a wafer center monitoring system with calibrated fiducial markers to measure non-concentricity and uniformity of process exclusion areas by determining the spatial relationship between the wafer and edge cover ring, using imaging systems and statistical process control to ensure proper alignment and leveling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If wafer edge cover rings are used during semiconductor processing, then film deposition and etch profiles are improved, but misalignment and tilting of the cover rings cause non-uniform process exclusion areas affecting die yield and quality

Engineering Contradiction:
Improvefilm deposition uniformityVSAvoiddie yield
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by forming fiducial markers on the wafer before the actual semiconductor processing. These markers serve as reference points that enable subsequent measurement and correction of cover ring alignment, allowing the system to pre-establish a reference framework that guides the alignment correction process and prevents non-uniform process exclusion areas.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using an imaging system to capture images of the fiducial markers and calculate deviations from ideal circular process exclusion areas. This feedback loop allows the system to measure the actual alignment status, compute correction values, and adjust the cover ring positioning iteratively until uniform process exclusion areas are achieved, thereby maintaining both film deposition uniformity and die yield.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If wafer center monitoring with fiducial markers is implemented, then non-concentricity measurement is enabled, but additional processing steps and measurement complexity are introduced

Engineering Contradiction:
Improvenon-concentricity measurementVSAvoidmonitoring system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses fiducial markers as intermediaries between the wafer and the imaging system. These markers serve as a bridge that translates the physical alignment status into measurable image data, allowing the system to indirectly measure non-concentricity through the positions of known reference points rather than directly measuring the cover ring-wafer alignment, thereby simplifying the measurement approach.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies copying by creating a digital representation of the process exclusion area through imaging the fiducial markers. The imaging system captures the physical arrangement of markers and processes this visual information to generate a computational model of the process area geometry, enabling precise non-concentricity measurement through image analysis rather than direct physical measurement.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20250379104A1Wafer center monitor
Publication Date: 2025.12.11 TEXAS INSTRUMENTS INC
  • US20250379104A1 patent drawing
  • US20250379104A1 patent drawing
  • US20250379104A1 patent drawing

AI summary

A wafer center monitoring system associated with a semiconductor processing tool. In one example, the semiconductor processing tool may include a wafer stage and an imaging system configured to determine a spatial relationship between a processed area of a semiconductor wafer on the wafer stage and a plurality of fiducial markers placed at a corresponding plurality of locations along a perimeter of the semiconductor wafer.