Wafer Defect Replacement Before Laminated Chip Assembly
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Solution Overview
Problem
The manufacturing of laminated device chips is hindered by the inclusion of defective semiconductor devices, leading to a significant decrease in yield due to the need to discard entire chips containing even a single defective product, despite other devices being non-defective.
Innovation Solution
A method involving the removal of defective device regions from wafers, followed by fitting non-defective device chips into the removed regions, and then laminating and dividing the wafers to form laminated device chips without defective products, using techniques like laser processing and adhesive fixing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If wafers including defective devices are used to manufacture laminated device chips, then the manufacturing process can proceed without additional steps, but the yield of laminated device chips decreases significantly due to defective products
Solution Approach 1:
The patent extracts and removes defective device regions from wafers before lamination. By identifying defective devices through inspection and selectively removing only the defective regions rather than entire wafers, the process eliminates the source of yield loss while preserving usable device regions for subsequent lamination and chip manufacturing
Solution Approach 2:
The patent performs preliminary inspection and removal of defective device regions before the lamination process. This advance action prevents defective devices from being incorporated into laminated structure, thereby preventing yield loss in subsequent manufacturing steps
2Reliability
If defective device regions are removed from wafers and non-defective device chips are fitted into removed regions, then the yield of laminated device chips is improved, but the device complexity and manufacturing process complexity increase
Solution Approach 1:
The patent merges the defective wafer (with removed defective regions) and the support substrate (containing non-defective device chips) into a single integrated structure. This combining approach allows simultaneous processing of multiple wafer regions and simplifies subsequent lamination steps by pre-assembling non-defective device chips on the support substrate
Solution Approach 2:
The patent introduces a support substrate as an intermediary carrier that holds non-defective device chips. This intermediary component facilitates the transfer and precise positioning of non-defective device chips into the removed defective regions, simplifying the overall process by providing a structured platform for chip integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses the decrease in yield by ensuring that only non-defective device chips are used in the laminated device chips, thereby improving the manufacturing efficiency and reducing waste.
Implementation Method 1
a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product
Implementation Method 2
a support substrate fixing step of fixing the wafer to a support substrate
Data Source
AI summary
A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, a support substrate fixing step of fixing the wafer to a support substrate, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region, and fixing the device chip to the support substrate.