Semiconductor Wafer CMP Sequencing for Low-Defect Polycrystalline Finish
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Solution Overview
Problem
Existing semiconductor wafer polishing methods face challenges in achieving uniform pad contact and are negatively impacted by caustic agents, which can lead to surface defects and require additional processing.
Innovation Solution
A method involving the deposition of a silicon layer on the semiconductor wafer, followed by polishing using a first slurry without a caustic agent to smooth the surface, and then using a second slurry with a higher caustic agent concentration for further polishing, while switching between multiple wafer polishing apparatus to ensure uniform material removal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single CMP process with caustic agent slurry is used, then polishing efficiency is improved, but surface defects are generated
Solution Approach 1:
The polishing process is divided into two separate CMP steps: a first CMP process without caustic agent to avoid surface defects, and a second CMP process with caustic agent to achieve the desired surface roughness. This segmentation allows each process to optimize for its specific function without compromising the other.
Solution Approach 2:
Different slurry compositions are applied at different stages of the polishing process. The first slurry (without caustic agent) is used when the pad is fresh, and the second slurry (with caustic agent) is used when the pad becomes worn, creating locally optimized conditions for each polishing phase.
2Speed
If wafer warp is present during CMP, then polishing speed is maintained, but uniform pad contact is lost
Solution Approach 1:
A carrier plate is used to apply pre-polishing force to the wafer before the main CMP process begins. This preliminary action compensates for wafer warp and ensures uniform contact between the wafer and polishing pad throughout the polishing process, preventing edge effects and maintaining manufacturing precision.
3Reliability
If polycrystalline layer is deposited to inhibit inversion layer, then device performance is improved, but surface roughness increases
Solution Approach 1:
The surface roughness of the polycrystalline layer is controlled by adjusting parameters of the CMP process, including slurry composition, polishing pressure, and pad condition. By optimizing these parameters, the process achieves the dual goal of maintaining the polycrystalline layer's electrical function while achieving the required surface smoothness for subsequent processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the uniformity of material removal and reduces surface defects, thereby improving the surface characteristics of semiconductor wafers and extending the life of polishing pads.
Implementation Method 1
A first slurry is applied to the semiconductor wafer and the silicon layer is polished to smooth the silicon layer
Implementation Method 2
The second slurry includes a greater amount of a caustic agent than the first slurry
Implementation Method 3
The silicon layer is polished while the semiconductor wafer is positioned on the second wafer polishing apparatus
Implementation Method 4
The pad is rotated and the wafer is brought into contact with and forced against the pad
Implementation Method 5
the wafer is brought into contact with and forced against the pad
Data Source
AI summary
A method of processing a semiconductor wafer includes depositing a silicon layer on the semiconductor wafer. A first slurry is applied to the semiconductor wafer and the silicon layer is polished to smooth the silicon layer. A second slurry is applied to the semiconductor wafer. The second slurry includes a greater amount of a caustic agent than the first slurry.