Transparent Wafer Carrier Cover for Accurate Reticle Field Marking

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Solution Overview

Problem

Conventional semiconductor wafer carriers are inefficient and unreliable for marking reticle fields on semiconductor wafers due to susceptibility to contamination and damage, and the difficulty in accurately seeing and marking surface details.

Innovation Solution

A transparent wafer cover with a reticle template and grid is used to align and mark semiconductor wafer field areas, preventing direct contact and contamination while enhancing visibility and accuracy through alignment with the grid and reticles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a lab operator manually marks field areas on the semiconductor wafer, then the marking process can be completed, but the delicate surface coatings are exposed to contamination and damage

Engineering Contradiction:
Improvemarking processVSAvoidcontamination and damage to surface coatings
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

A transparent cover with reticle template is introduced as an intermediary between the operator and the wafer surface. The operator marks the template rather than directly contacting the wafer, eliminating direct exposure of delicate surface coatings to contamination and damage while still enabling field area identification and marking.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Difficulty of detecting and measuring

If the wafer is held up to a light source or viewed under dark field microscopy to see surface features, then surface details become visible, but the process becomes slow and time-consuming

Engineering Contradiction:
Improvevisibility of surface featuresVSAvoidtime to detect and mark field areas
Core Design Contradiction:
Difficulty of detecting and measuringVSLoss of time

Solution Approach 1:

The reticle template on the transparent cover serves as a copy or representation of the wafer's field area layout. Instead of directly observing and interpreting complex surface features under microscopy, the operator simply aligns and marks the template, dramatically reducing detection time while maintaining accuracy.

Inventive Principle:
Principle #26Copying

3Measurement precision

If field areas are marked by visually counting and identifying them under microscopy, then field areas can be located, but miscounting and incorrect markings occur due to difficulty seeing surface details

Engineering Contradiction:
Improveaccuracy of field area markingVSAvoidvisibility of surface details for counting
Core Design Contradiction:
Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

The reticle template provides a simplified copy of the field area configuration that is easily visible and countable. The template's clear geometric representation eliminates the difficulty of seeing and counting surface features, ensuring accurate field area identification and marking without miscounting errors.

Inventive Principle:
Principle #26Copying

4Ease of operation

If conventional wafer carriers are used for marking, then the wafer can be held and marked, but the process is costly, time-consuming, and unreliable

Engineering Contradiction:
Improvewafer handling and markingVSAvoidreliability of marking process
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The transparent cover with reticle template acts as a reliable intermediary that protects the wafer while enabling accurate marking. This system eliminates the unreliability of direct manual marking by providing a controlled interface that prevents contamination and damage, ensuring consistent and trustworthy marking results.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250140587A1Wafer carrier with reticle template for marking reticle fields on a semiconductor wafer
Publication Date: 2025.05.01 MICRON TECHNOLOGY INC
  • US20250140587A1 patent drawing
  • US20250140587A1 patent drawing
  • US20250140587A1 patent drawing

AI summary

A wafer carrier assembly comprising a wafer carrier having a first and second side, the first side including: a circular recess configured to receive a semiconductor device wafer, and at least one cut-out arranged along the circumference of the circular recess. The first side also includes a carrier cover having a top and bottom side, the top side including: a plurality of gridlines extending to edges of the carrier cover, and a plurality of reticles extending from the top side to the bottom side where subsets of reticles are arranged to have a common center and each subset of reticles is arranged at each intersection of the plurality of gridlines.