Wafer Defect Coordinate Conversion for Precise Killer Defect Classification
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Solution Overview
Problem
In semiconductor manufacturing, the identification of killer defects is hindered by defects size deviation between SEM and optical microscope metrology data and defect inspection tool data, leading to inaccurate Killer Defect Index calculations and inefficient yield improvement in semiconductor fabs.
Innovation Solution
A smart defect calibration system that uses IC design layout data and Critical Area Analysis to calibrate defect size and coordinate deviations, enabling precise classification of defects as killer or non-killer defects by aligning defect inspection data with design layout coordinates and sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If defect size data from defect inspection tool is used directly for Critical Area_analysis, then processing speed is improved, but measurement precision deteriorates due to size deviation between inspection tool and SEM/optical microscope
Solution Approach 1:
The patent performs preliminary calibration by measuring reference defects with both the defect inspection tool and SEM/optical microscope before production testing. This preliminary action establishes a calibration curve that compensates for systematic size deviations, allowing the inspection tool to provide both fast processing and accurate measurements.
Solution Approach 2:
The patent introduces a calibration curve as an intermediary element between the defect inspection tool data and the Critical Area_analysis. This calibration curve, derived from comparing inspection tool measurements with SEM/optical microscope measurements, acts as a mediator to correct size deviations while maintaining processing efficiency.
2Device complexity
If coordinate conversion without calibration is used, then device complexity is reduced, but manufacturing precision deteriorates due to coordinate deviation between defect image and design layout
Solution Approach 1:
The patent performs preliminary coordinate calibration by measuring the coordinate deviations between multiple defect images and their corresponding design layout patterns before production testing. This preliminary action establishes calibration parameters that are stored and applied during actual defect analysis, ensuring precise location mapping without adding complexity to the main processing flow.
3Productivity
If only a small number of defect images are selected for analysis, then productivity is improved, but reliability deteriorates because real killer defects cannot be identified
Solution Approach 1:
The patent replaces the mechanical/manual process of selecting defect images for analysis with an automated intelligent system. This system uses coordinate-calibrated defect locations, Critical Area_analysis, and killer defect probability calculation to automatically identify and prioritize defects that are most likely to be killers, eliminating the need for manual inspection of numerous images while improving both throughput and reliability.
Data Source
AI summary
A smart conversion and calibration of the defect coordinate, diagnosis, sampling system and the method thereof for manufacturing fab is provided. The intelligent defect diagnosis method includes receiving pluralities of defect data, design layout data, analyzing the defect data, design layouts, by a Critical Area Analysis (CAA) system. This method utilizes the precisely calibrated coordinate, the defect layout pattern, and the higher accurate calibrated defect size value. So, a more precise killer defect index can be generated with calibrated coordinate deviation calibration and defect size deviation calibration. When judging a defect relating to short circuit or open circuit failure probability, the defect failure result is more accurate and less incorrect judgment.


