Wafer Defect Detection Using Outlier Sampling and Global Analysis

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Solution Overview

Problem

Current patterned wafer defect detection methods rely solely on local criteria, failing to simultaneously sample random and systematic defects, and do not utilize global criteria, leading to incomplete defect reporting and missed systematic defects.

Innovation Solution

A computer-implemented method for detecting defects on a wafer by comparing output to defect detection thresholds, sampling outliers based on predetermined criteria, and performing wafer-level analysis to select and combine information for generating inspection results, incorporating both local and global criteria.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If local criteria only are used for defect detection, then the detection process is simple and fast, but systematic defects are missed and detection accuracy is incomplete

Engineering Contradiction:
Improvedefect detection accuracyVSAvoidinspection system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The inspection system is segmented into multiple independent modules: local defect detection module, outlier sampling module, wafer-level analysis module, and result combination module. Each module handles a specific aspect of defect detection, allowing the system to incorporate complex wafer-level analysis without overwhelming the entire system architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system transitions from purely local (pixel/die level) analysis to include wafer-level (global) analysis as an additional dimension. By sampling outliers and performing wafer-level statistical analysis, the system captures systematic defects that manifest across multiple dies, adding a global dimension to the traditionally local inspection process.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If wafer-level analysis is performed on all outliers, then comprehensive defect detection is achieved, but processing time and computational resources increase significantly

Engineering Contradiction:
Improvedefect detection completenessVSAvoidinspection processing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

Instead of performing wafer-level analysis on all detected outliers (excessive action), the system selectively samples a subset of outliers for wafer-level analysis (partial action). This sampling approach maintains detection completeness for systematic defects while significantly reducing the computational burden and processing time.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system performs preliminary local defect detection and outlier identification before conducting wafer-level analysis. This preliminary filtering step prepares the data in advance, allowing the wafer-level analysis to focus only on relevant candidates and reducing overall processing time.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If local defect detection methods are used, then processing speed is maintained, but random and systematic defects cannot be simultaneously sampled

Engineering Contradiction:
Improveinspection throughputVSAvoiddefect sampling comprehensiveness
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The inspection system is designed with multi-functionality to handle both random defects (through local detection) and systematic defects (through wafer-level outlier sampling) within a single unified process. The system universally processes all defect types without requiring separate inspection passes, maintaining productivity while improving comprehensiveness.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7756658B2Systems and methods for detecting defects on a wafer and generating inspection results for the wafer
Publication Date: 2010.07.13 KLA CORP
  • US7756658B2 patent drawing
  • US7756658B2 patent drawing
  • US7756658B2 patent drawing

AI summary

Systems and methods for detecting defects on a wafer and generating inspection results for the wafer are provided. One method includes detecting defects on a wafer by comparing output generated by scanning of the wafer performed by an inspection system to one or more defect detection thresholds. The method also includes sampling outliers in the output by selecting the output having the highest values from bins defined based on one or more predetermined criteria. In addition, the method includes selecting a portion of the sampled outliers based on wafer-level analysis of the sampled outliers. The method further includes generating inspection results for the wafer by combining information about the selected portion of the sampled outliers with information about the defects detected using the one or more defect detection thresholds.