Wafer Repair by Defect Replacement for Laminated Chip Yield

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Solution Overview

Problem

The manufacturing of laminated device chips is hindered by the inclusion of defective semiconductor devices, leading to a significant decrease in yield due to the need to discard entire chips containing even a single defective product, despite other devices being non-defective.

Innovation Solution

A method involving the removal of defective device regions from wafers and fitting non-defective device chips into the removed regions, followed by resin filling and grinding, to create a wafer without defects, which is then laminated and divided to produce high-yield laminated device chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If wafers including defective devices are used for lamination, then the manufacturing process can proceed without additional steps, but the yield of laminated device chips decreases significantly

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidyield of laminated device chips
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing inspection of semiconductor devices on wafers before the lamination process. The inspection results are used to determine optimal wafer combinations in advance, ensuring that defective devices are identified and accounted for before lamination occurs. This preliminary inspection and planning prevents defective devices from compromising the entire laminated chip, thereby resolving the contradiction between manufacturing efficiency and yield.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If wafer inspection and optimal combination determination are performed, then the number of defective chips is minimized, but the manufacturing process complexity increases

Engineering Contradiction:
Improveyield of laminated device chipsVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by creating a multi-functional wafer management system that performs multiple functions: inspection of semiconductor devices, determination of optimal wafer combinations, tracking of defective devices, and guidance of the lamination process. This integrated approach consolidates what would otherwise be separate complex processes into a unified system, reducing overall process complexity while maintaining high yield.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Manufacturing precision

If defective device regions are removed and replaced with non-defective device chips, then wafer quality is improved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvewafer qualityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies the taking out principle by removing defective device regions from wafers and replacing them with non-defective device chips. This extraction of defective portions and substitution with functional components directly improves wafer quality and eliminates the source of yield problems, while the modular nature of the replacement process keeps the added complexity manageable.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11764114B2Wafer manufacturing method and laminated device chip manufacturing method
Publication Date: 2023.09.19 DISCO CORP
  • US11764114B2 patent drawing
  • US11764114B2 patent drawing
  • US11764114B2 patent drawing

AI summary

A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a support substrate fixing step of fixing the wafer to a support substrate, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region, and fixing the device chip to the support substrate.