Wafer Dicing Plasma Etching with Die-Attach Layer Processing
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Solution Overview
Problem
The existing semiconductor wafer dicing processes that use plasma etching struggle to efficiently process wafers with laminated die-attach layers, requiring multiple steps and being time-consuming due to the inability of fluorine-based gases to effectively process these layers.
Innovation Solution
A method involving preparing a wafer unit with a die-attach layer, performing plasma etching on the wafer to expose the die-attach layer, and then processing the die-attach layer using a second gas, followed by a cleaning step to remove filler residuals, all while minimizing the number of working steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If fluorine-based gases are used in plasma etching to divide wafers, then the wafer can be divided efficiently, but the die-attach layer cannot be processed
Solution Approach 1:
The plasma etching process is segmented into two distinct steps: first using fluorine-based gas to etch the wafer substrate, then switching to a different plasma gas to process the die-attach layer. This segmentation allows each gas type to be optimized for its specific function while maintaining overall process efficiency
Solution Approach 2:
The invention changes the chemical parameters of the plasma etching process by switching between different gas compositions (fluorine-based gas for wafer division, then oxygen-based or other reactive gases for die-attach layer processing). This parameter change enables the same plasma etching equipment to handle both the wafer substrate and the die-attach layer effectively
2Reliability
If multiple processing steps are used to divide wafer and die-attach layer, then both can be processed, but the number of working steps increases and time is consumed
Solution Approach 1:
The invention merges the wafer division process and the die-attach layer processing into a single integrated plasma etching operation. By combining these two functions into one continuous process using different gas phases, the method eliminates the need for separate processing steps and reduces overall processing time while maintaining complete processing of both wafer and die-attach layer
3Manufacturing precision
If die-attach layer is processed separately after wafer division, then both can be divided, but the process becomes tedious and complex
Solution Approach 1:
The plasma etching apparatus is made universal by enabling it to perform both wafer substrate etching and die-attach layer processing through gas composition changes. This multi-functionality allows a single device to handle multiple processing tasks that were previously requiring different equipment or separate operations, thereby reducing process complexity while maintaining precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the number of working steps required to manufacture chips with laminated die-attach layers, improving efficiency and reducing processing time by effectively dividing the die-attach layer without increasing the complexity of the process.
Implementation Method 1
supplying a first gas to the wafer unit and performing plasma etching on the wafer from the face side thereof to divide the wafer
Implementation Method 2
Fluorine-based gases that are widely used in plasma etching processes for dividing wafers
Implementation Method 3
supplying a second gas to the wafer unit and performing plasma etching on the die-attach layer from the face side of the wafer
Implementation Method 4
ejecting a fluid to the face side of the wafer to remove filler residuals that have remained along the projected dicing lines
Data Source
AI summary
A method of manufacturing chips includes a preparing step of preparing a wafer unit in which a wafer having a plurality of devices formed thereon is affixed to a tape with a die-attach layer being interposed therebetween, the die-attach layer including fillers, and the devices are protected by a protective member and a face side of the wafer is exposed along the projected dicing lines, a wafer processing step of performing plasma etching on the wafer from the face side thereof to divide the wafer and expose the die-attach layer along the projected dicing lines, a die-attach layer processing step of performing plasma etching on the die-attach layer from the face side of the wafer, and a cleaning step of ejecting a fluid to the face side of the wafer to remove filler residuals along the projected dicing lines from the wafer unit.