Wafer Dicing Pulse Train Laser Plasma Etch
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Solution Overview
Problem
Current methods for dicing semiconductor wafers, such as scribing and sawing, result in chipping, cracking, and waste of wafer real estate due to jagged separation lines and the need for significant spacing between dice, while plasma dicing faces cost and implementation limitations, particularly with metals like copper.
Innovation Solution
A hybrid dicing process combining pulse train laser scribing with multiple-pulse bursts to create a patterned mask, followed by plasma etching, which minimizes thermal damage and precisely controls ablation depth and width, allowing for clean separation of integrated circuits without significant waste.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If scribing or sawing is used to dice semiconductor wafers, then the wafer can be separated into individual dice, but chips and gouges form along the severed edges and cracks propagate into the substrate
Solution Approach 1:
The patent replaces mechanical scribing and sawing systems with a laser-based system that uses optical energy to ablate material along scribe lines. This substitution eliminates the mechanical contact that causes chips, gouges, and cracks, while achieving clean separation of dice with minimal damage to the substrate and integrated circuits.
Solution Approach 2:
The patent employs controlled laser parameters including pulse duration, pulse repetition rate, and beam intensity to achieve precise material removal. By adjusting these parameters, the system achieves clean ablation along scribe lines without generating the mechanical stress that leads to cracking and chipping in traditional methods.
2Productivity
If traditional scribing or sawing methods are used, then dice can be separated, but significant spacing must be maintained between dice to prevent damage, wasting wafer real estate
Solution Approach 1:
By replacing mechanical separation methods with laser ablation, the system achieves clean cuts that do not generate chips or cracks requiring buffer spacing. This allows dice to be placed closer together on the wafer, maximizing the use of wafer real estate while maintaining reliability through the non-contact, precision nature of laser processing.
3Productivity
If sawing is used to dice wafers, then thick wafers can be separated, but the blade thickness and required spacing waste substantial wafer area
Solution Approach 1:
The patent replaces the physical saw blade with a laser beam that can cut through thick wafers without requiring blade thickness or lateral clearance. This enables much tighter spacing between dice while maintaining the ability to dice thick wafers, significantly improving wafer real estate utilization without sacrificing manufacturing capability.
4Reliability
If plasma dicing is used, then clean separation may be achieved, but cost and implementation issues arise particularly with metals like copper
Solution Approach 1:
The patent uses laser parameters (wavelength, pulse duration, intensity) that can be optimized for different materials including metals like copper. This provides a versatile solution that achieves clean separation comparable to plasma dicing while avoiding the material-specific limitations and high costs associated with plasma processing equipment and operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces micro-cracks, delamination, and chipping, enabling more efficient use of wafer space by allowing closer spacing of dice and improving the overall dicing process through precise control of ablation, thus enhancing manufacturing throughput and reducing post-processing cleaning needs.
Implementation Method 1
The mask is then patterned with a pulse train laser scribing process using multiple-pulse bursts to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits
Implementation Method 2
The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits
Data Source
AI summary
Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a pulse train laser scribing process using multiple-pulse bursts to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.