Wafer Die Layout Calculation for Fast Accurate Die Counting
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Solution Overview
Problem
Existing methods for calculating the maximum number of complete dies that can be obtained from a wafer are either approximate or time-consuming, lacking a quick and accurate method for determining die layout.
Innovation Solution
A die layout calculation method involving the selection of a reference die, multiple movements of the wafer center to determine coverage regions, and the identification of optimal die locations to maximize the number of complete dies with minimal shots required, using a combination of grid and boundary tracing algorithms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the step search method is used to calculate the number of complete dies, then the accuracy of die count is improved, but the calculation time increases significantly
Solution Approach 1:
The patent divides the wafer into multiple regions and performs calculations for each region separately. By segmenting the wafer surface into manageable sections and calculating complete dies in each segment, the method achieves accurate overall die counting without requiring exhaustive search of the entire wafer surface, thus reducing calculation time while maintaining precision.
Solution Approach 2:
The patent performs preliminary calculations by determining the positions and dimensions of dies before conducting the complete die count. By pre-calculating die locations, sizes, and overlapping regions, the method establishes a foundation that enables accurate die counting without requiring time-consuming iterative searches, thereby resolving the contradiction between accuracy and calculation time.
2Productivity
If the approximate formula is used to calculate the number of dies, then the calculation speed is improved, but the accuracy decreases significantly
Solution Approach 1:
The patent replaces complex iterative mechanical search methods with an optimized calculation algorithm. By substituting the traditional step-by-step search approach with a mathematical model that directly computes die positions and coverage, the method achieves both high calculation speed and accurate results, eliminating the need for time-consuming iterative processes while maintaining precision.
Solution Approach 2:
The patent changes the calculation parameters from approximate values to precise values by incorporating exact die dimensions, wafer radius, and positional relationships into the calculation model. By using accurate parameters rather than approximations, the method achieves both fast calculation and high precision, resolving the contradiction between speed and accuracy.
3Reliability
If more shots are used to cover all dies, then the coverage completeness is improved, but the manufacturing cost increases
Solution Approach 1:
The patent dynamically determines the optimal number and positioning of shots based on the actual die layout and wafer characteristics. By adaptively adjusting the shot configuration to match the specific die arrangement, the method achieves complete coverage of all dies while minimizing the number of shots required, thus reducing manufacturing costs without sacrificing coverage completeness.
Solution Approach 2:
The patent uses the calculated die layout information to create an optimized shot plan that accurately replicates the required coverage. By generating a precise digital model of the die arrangement and using it to plan shot positions and orientations, the method ensures complete coverage while minimizing redundant shots, thereby reducing manufacturing costs while maintaining reliability.
Data Source
AI summary
A die layout calculation method is provided. The method includes: selecting, based on a distribution array of a plurality of dies in a wafer, one die as a reference die; making first movements of a wafer center to determine a first coverage region for each first movement, and determining a feasible region based on a number of complete dies in each first coverage region; making a plurality of second movements of the wafer center in the feasible region to determine a second coverage region for each second movement, and determining a relative position of the wafer center in the reference die corresponding to a maximum number of complete dies in the second coverage region; and determining a die layout comprising a location of each die in the wafer. This method improves the accuracy and efficiency of determining the maximum number of dies.


