Semiconductor Wafer Dopant Contamination Evaluation
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Solution Overview
Problem
Current methods for evaluating dopant contamination in semiconductor wafers are destructive, time-consuming, and costly, as they require cutting chips from the wafer and cannot accurately measure dopant distribution across the entire surface layer.
Innovation Solution
A non-destructive method combining eddy current and surface photovoltage techniques to measure resistivity in the bulk and surface layers of semiconductor wafers, allowing for the calculation of dopant contamination without contact and across the entire surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If SIMS method is used to evaluate dopant contamination, then measurement precision is improved, but the evaluation becomes destructive and time-consuming
Solution Approach 1:
The patent replaces the mechanical destructive method (cutting chips for SIMS analysis) with non-contact electrical measurement methods (eddy current and surface photovoltage techniques). This substitution maintains measurement precision while eliminating the time-consuming chip cutting and processing steps, directly resolving the contradiction between precision and time loss.
Solution Approach 2:
The patent creates electrical property maps that copy the dopant distribution information without physically sampling the material. By measuring resistivity distribution across the wafer surface and correlating it with dopant concentration, the system produces a comprehensive evaluation map that replaces the need for multiple physical chip samples, reducing evaluation time while maintaining precision.
2Measurement precision
If SIMS method is used to evaluate dopant contamination, then measurement precision is improved, but device complexity and cost increase
Solution Approach 1:
The patent employs measurement techniques (eddy current and surface photovoltage methods) that serve multiple functions: they measure bulk resistivity, surface resistivity, and enable dopant contamination evaluation all through non-contact electrical measurements. This multi-functionality reduces the need for specialized complex equipment and procedures required by SIMS, lowering device complexity and cost while maintaining precision.
Solution Approach 2:
By replacing the complex mechanical chip preparation and analysis system with non-contact electrical measurement systems, the patent significantly simplifies the evaluation process. The eddy current and surface photovoltage methods require no sample preparation, no chip cutting, and no complex vacuum chamber equipment, directly reducing device complexity and operational cost.
3Measurement precision
If chip cutting is performed for evaluation, then dopant concentration can be measured, but the evaluation cannot cover the entire wafer surface
Solution Approach 1:
The patent transitions from point-based measurement (individual chips) to area-based measurement by scanning the wafer surface with electrical measurement probes. This dimensional change from 0D/1D sampling to 2D surface mapping enables comprehensive coverage of the entire wafer while maintaining measurement precision through systematic scanning and data processing.
Solution Approach 2:
The electrical measurement system is designed to evaluate the entire wafer surface through scanning measurements, making the evaluation process universal across the complete area. This eliminates the limitation of chip-based methods that can only evaluate small sampled regions, allowing comprehensive dopant contamination assessment across the full wafer while maintaining precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate, quick, and cost-effective evaluation of dopant contamination on the entire surface of semiconductor wafers, even after heat treatment, by distinguishing between bulk and surface layer resistivity, thereby improving manufacturing yield and quality.
Implementation Method 1
a resistivity of a bulk portion of the semiconductor wafer is measured by an eddy current method
Implementation Method 2
a resistivity in a surface layer of the semiconductor wafer is measured by a surface photovoltage method
Data Source
AI summary
The present invention provides a method for evaluating dopant contamination of a semiconductor wafer, wherein a resistivity of a bulk portion of the semiconductor wafer is measured by an eddy current method, a resistivity in a surface layer of the semiconductor wafer is measured by a surface photovoltage method, and an amount of dopant contamination of the semiconductor wafer is calculated from a difference between a value of the resistivity of the bulk portion measured by the eddy current method and a value of the resistivity in the surface layer measured by the surface photovoltage method. As a result of this, it is possible to provide the method for evaluating dopant contamination of a semiconductor wafer, which can measure the amount of dopant contamination of a whole surface layer of the semiconductor wafer without contact, nondestructively, and accurately.