Wafer Edge Imaging for Accurate Global Position Correction

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Solution Overview

Problem

In semiconductor manufacturing, the precise alignment of patterns on a wafer is critical to prevent performance and reliability issues in integrated circuits, but measurement errors can occur due to discrepancies between the global position in the recipe and the actual wafer position on the chuck.

Innovation Solution

An arrangement device and method that uses a detector to obtain images of the wafer, digitalize them into black and white, model edge lines, and calculate the central position using a processor, allowing for accurate identification and correction of the wafer's global position.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the global position in the recipe differs from the actual wafer position on the chuck, then measurement errors occur, but correcting the global position requires accurate identification of the wafer's central position which is not trivial

Engineering Contradiction:
Improvemeasurement precisionVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary marker (such as a reflective marker or fiducial marker) placed on the wafer as a mediator between the measurement device and the wafer position. This marker serves as a reference point that simplifies the determination of the wafer's central position and orientation, thereby improving measurement precision without significantly increasing device complexity. The marker acts as a bridge that translates the complex problem of wafer positioning into a simpler problem of marker detection and analysis.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If various types of measurement devices are used to check the arrangement state of patterns, then measurement accuracy improves, but the complexity of the measurement system increases

Engineering Contradiction:
Improvemeasurement precisionVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements a universal measurement approach where a single measurement device is equipped with multiple functional capabilities. The device can perform various measurement tasks including pattern arrangement verification, wafer position detection, and central position identification using a unified measurement system. This multi-functional device reduces the need for multiple specialized devices while maintaining measurement precision across different measurement objectives.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses markers or reference features as intermediaries that enable a single measurement device to accurately perform multiple measurement functions. These markers serve as universal reference points that the measurement device can utilize for different measurement tasks, thereby achieving multi-functionality without requiring multiple complex specialized devices.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If the central position of the wafer is not accurately identified, then global position correction cannot be performed, but traditional methods of identifying the central position are complex and time-consuming

Engineering Contradiction:
Improvemanufacturing precisionVSAvoidloss of time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-placing markers or reference features on the wafer before the measurement process. These pre-positioned markers serve as ready-made reference points that significantly accelerate the identification of the wafer's central position. By preparing the wafer with these markers in advance, the measurement device can quickly and accurately determine the central position without requiring complex real-time analysis or time-consuming measurement procedures.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240249436A1Arrangement device and method
Publication Date: 2024.07.25 AUROS TECH INC
  • US20240249436A1 patent drawing
  • US20240249436A1 patent drawing
  • US20240249436A1 patent drawing

AI summary

An arrangement device includes: a detector obtaining an image in a field of view (FOV) of a wafer, and a processor digitalizing the obtained image into black and white to model an edge line, and identifying a central position of the wafer by using the modeled edge line. The processor stores three reference points placed at half of a width and half of a height of the FOV, and obtains the image at each of the three reference points.