Wafer Edge Oxide Protection for Thinning-Induced Die Damage

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Solution Overview

Problem

During the wafer thinning process in semiconductor manufacturing, the edge regions of wafers can be damaged, leading to defects in functional dies and interconnect structures, which can result in connection issues and water vapor absorption, compromising the integrity and performance of semiconductor devices.

Innovation Solution

A protection layer, including high etch selectivity materials and oxide structures, is applied to the wafer edge to prevent damage during the thinning and subsequent backside processes, increasing the distance between the trimmed edge and functional dies, thereby reducing defects and protecting dielectric materials and interconnect structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If wafer thinning process is performed to reduce wafer thickness, then wafer thickness is reduced enabling vertical stacking, but edge regions of wafer are damaged causing defects in functional dies

Engineering Contradiction:
Improvewafer thicknessVSAvoidedge region integrity
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

A protection layer is formed on the edge regions of the wafer before the thinning process begins. This preliminary protective measure ensures that when the wafer is subsequently thinned, the edge regions are already shielded and will not be damaged during the mechanical removal of material.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protection layer acts as an intermediary substance between the wafer edge regions and the thinning process. This intermediate layer absorbs the mechanical stress and damage that would otherwise be inflicted directly on the fragile edge regions during thinning, allowing the process to proceed without compromising edge integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-generated harmful factors

If edge trimming process is performed to remove damaged outer edge, then damaged edge material is removed, but distance between trimmed edge and functional dies is reduced increasing defect risk

Engineering Contradiction:
Improveedge damage removalVSAvoidfunctional die integrity
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The protection layer is formed before edge trimming, extending further out than the intended trim line. This preliminary extension ensures that when trimming occurs, the protection layer remains as a buffer zone, maintaining an adequate distance between the trimmed edge and the functional dies to prevent defect propagation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protection layer is applied specifically to edge regions with different thickness or extension compared to the bulk wafer. This localized quality ensures that the protective function is concentrated where it is most needed - at the vulnerable edge regions - without affecting the overall wafer structure or requiring extensive protection elsewhere.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20230402405A1Protection layer for semiconductor device
Publication Date: 2023.12.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20230402405A1 patent drawing
  • US20230402405A1 patent drawing
  • US20230402405A1 patent drawing

AI summary

The present disclosure describes a method to form a semiconductor structure having an oxide structure on a wafer edge. The method includes forming a device layer on a first substrate, forming an interconnect layer on the device layer, forming an oxide structure on a top surface and along a sidewall surface of the interconnect layer, forming a bonding layer on the oxide structure and the interconnect layer, and bonding the device layer to a second substrate with the bonding layer.