Wafer Edge Passivation for MEMS Etching Protection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The isotropic etching process in the fabrication of MEMS devices often results in contamination and damage due to the removal of dielectric layers, affecting the operation of both MEMS and CMOS devices.
Innovation Solution
A fabrication method that involves removing the dielectric layer in the edge region and forming a passivation layer covering the dielectric layer and substrate before isotropic etching, using a metal-atom-containing material to prevent etchant penetration and contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the dielectric layer surrounding the MEMS device is removed through isotropic etching to enable mechanical characteristics, then the MEMS device can achieve vibration and mechanical functionality, but the etching process generates contaminations and blemishes that damage devices and affect operation
Solution Approach 1:
The patent segments the wafer into die regions and an edge region, and further segments the dielectric layer removal process to apply only to the edge region. This segmentation allows the MEMS devices in die regions to achieve mechanical characteristics through dielectric removal while protecting them from contamination by limiting the etching process to the edge region only.
Solution Approach 2:
The patent applies different treatments to different regions: the edge region undergoes dielectric layer removal for mechanical functionality, while die regions maintain their dielectric layers for device protection. This local quality approach ensures that contamination occurs only in the edge region and not in the sensitive die regions containing operational devices.
2Adaptability or versatility
If the dielectric layer is removed to fabricate MEMS devices with mechanical characteristics, then the MEMS device can vibrate and function mechanically, but the metal-interconnect structure and MOS device operation are compromised due to contamination from the etching process
Solution Approach 1:
The patent divides the wafer into die regions containing operational devices and an edge region for mechanical functionality. By segmenting the dielectric removal process to affect only the edge region, the patent enables MEMS mechanical functionality while preserving the reliability of devices in die regions through protective isolation.
Solution Approach 2:
The patent extracts the harmful etching process from the die regions and relocates it to the edge region. This extraction allows the beneficial mechanical characteristics to be achieved in the edge region while eliminating the harmful contamination effects from the die regions where reliable device operation is critical.
3Ease of manufacture
If the dielectric layer at the wafer edge is removed through isotropic etching, then the edge region can be exposed for further processing, but the dielectric layer and structures on the wafer edge are peeled off causing contamination
Solution Approach 1:
The patent applies a protective coating to the dielectric layer in the edge region before performing isotropic etching. This preliminary protective action prevents the dielectric layer and structures from peeling off during the etching process, thereby achieving edge region exposure without the harmful peeling and contamination effects.
Solution Approach 2:
The protective coating applied beforehand to the dielectric layer in the edge region acts as a cushioning layer that absorbs the mechanical stress and chemical attack during isotropic etching. This beforehand cushioning prevents the dielectric layer from peeling off and eliminates contamination, while still allowing the edge region to be properly exposed for subsequent processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents the dielectric layer at the wafer edge and its structures from being peeled off, thereby protecting the MEMS devices from contamination and ensuring the integrity of both MEMS and CMOS devices during the etching process.
Implementation Method 1
a passivation layer is formed to cover the dielectric layer and the exposed substrate... the passivation layer comprises a metal-atom-containing material, and is electrically insulated from the bonding pad
Data Source
AI summary
A fabrication method of a wafer structure includes: providing a substrate having a plurality of die regions and an edge region surrounding the die regions defined thereon; then, forming a dielectric layer, a plurality of MEMS devices, a plurality of metal-interconnect structures and a plurality bonding pads on the substrate in the die regions; next, removing the dielectric layer disposed on the substrate of the edge region to expose the substrate; and thereafter, forming a passivation layer to cover the substrate and the dielectric layer.


