Wafer Edge Registration via X-Y Stage Imaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing wafer top near edge inspection and metrology systems are limited by their proprietary scanning stages and cameras, which are not adaptable to the varying geometry of wafer edges, leading to inefficiencies in edge inspection and requiring dedicated pre-aligning systems, making them time-consuming and unsuitable for undefined edge geometries.
Innovation Solution
A method and system utilizing an X-Y stage and a camera to acquire and process wafer edge area images, employing techniques like edge-driven cross bilateral filtering, differential operators, and randomized Hough transforms to detect wafer edges and layer edges, allowing for wafer alignment and inspection without dedicated cameras or pre-aligning systems, and enabling the use of the same optical elements for both edge and non-edge area imaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If dedicated scanning stages and cameras are used for wafer edge inspection, then measurement precision is improved, but device complexity increases and productivity decreases
Solution Approach 1:
The patent applies universality by enabling the same optical elements and cameras used for patterned wafer area inspection to also perform wafer edge inspection. The system uses a single inspection system with configurable algorithms to handle both patterned areas and un-patterned edge areas, eliminating the need for separate dedicated edge inspection hardware.
Solution Approach 2:
The patent changes parameters by dynamically adjusting inspection algorithms and area definitions based on whether the region is patterned or un-patterned. The system modifies processing parameters and algorithm selection according to the local geometry characteristics, allowing one system to adapt to multiple inspection scenarios without dedicated hardware for each.
2Measurement precision
If dedicated pre-aligning systems are used to define wafer notch/flat orientation, then alignment precision is improved, but productivity decreases due to time consumption
Solution Approach 1:
The patent applies preliminary action by performing edge detection and alignment calculations during the inspection process itself rather than requiring separate pre-alignment steps. The system detects edge geometry and determines wafer orientation as part of the inspection workflow, eliminating time-consuming dedicated pre-aligning operations before inspection.
Solution Approach 2:
The inspection system performs self-alignment by automatically detecting wafer edge geometry and calculating appropriate alignment parameters during inspection. The system uses the wafer's own edge features as reference for alignment, eliminating the need for external dedicated pre-aligning systems and reducing cycle time.
3Device complexity
If patterned wafer area inspection algorithms are applied to wafer edge areas, then device complexity is reduced, but measurement precision deteriorates due to undefined edge geometry
Solution Approach 1:
The patent applies local quality by using different inspection algorithms and parameters for different regions of the wafer. The system identifies whether each area is patterned or un-patterned and applies appropriate processing methods locally. For edge areas with undefined geometry, specialized edge detection algorithms are used, while patterned areas use standard inspection algorithms.
Solution Approach 2:
The patent applies dynamics by making the inspection system adaptive and configurable based on local geometry characteristics. The system dynamically selects and adjusts algorithms, processing parameters, and area definitions based on whether the current region is patterned or un-patterned, allowing optimal performance across different wafer regions without sacrificing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient wafer edge inspection and metrology by defining areas of interest based on edge location and shape, allowing for dynamic registration and detection of wafer layer edges, reducing the need for dedicated hardware and streamlining the inspection process.
Implementation Method 1
placing the wafer on a chuck that may include a reflective element that is positioned such that an inner portion of the reflective element is concealed by at least the edge of the wafer and an outer portion of the reflective element is non-concealed by the wafer
Data Source
AI summary
A method for wafer registration, the method may include: moving a wafer by an X-Y stage and acquiring wafer edge area images; and processing the wafer edge area images to locate an edge of the wafer. A system that includes a camera, an X-Y stage for moving a wafer; wherein the camera is arranged to acquire wafer edge area images; and a processor that is arranged to process the wafer edge area images to locate an edge of the wafer.