Wafer Level Edge Stacking Conductive Bonding
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Solution Overview
Problem
In microelectronic stack assemblies, achieving robust and reliable electrical connections between vertically stacked dies is challenging due to the increased number of connections required, which demands efficient and reliable conductive paths that are not easily achieved with traditional packaging methods.
Innovation Solution
The solution involves forming electrically conductive elements on the surfaces and edges of microelectronic devices, which are then bonded using fusible metals or conductive pastes to create a conductive path between the devices, allowing for angled edge connections that facilitate efficient stacking and reliable electrical conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple dies are vertically stacked to save space on the substrate, then the area utilization on the printed circuit board is improved, but the complexity of electrical connections between dies increases
Solution Approach 1:
The patent transitions from planar electrical connections to three-dimensional edge-based connections. Conductive elements extend along the vertical edges of dies, enabling electrical connections in the vertical dimension rather than only in the planar dimension. This allows multiple dies to be stacked vertically with robust edge-to-edge conductive bonding, reducing substrate area while managing connection complexity through spatial reorganization.
Solution Approach 2:
The patent implements a nested structure where conductive elements are integrated within and along the edges of the die structures themselves. The conductive paths are embedded in the die edge regions, creating a compact nested arrangement where electrical connection functionality is integrated within the physical structure of the dies rather than requiring separate external connection mechanisms.
2Reliability
If conductive elements extend along edge surfaces at angles other than right angles, then the robustness of electrical connections is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent changes the geometric parameter of conductive element orientation from the conventional right angle (90 degrees) to angled configurations. The conductive elements extend along edge surfaces at various angles, which improves mechanical interlocking and bonding surface area for electrical connections. This parameter change enhances connection robustness while the angled geometry can be accommodated through standard semiconductor fabrication processes.
Solution Approach 2:
The patent applies different geometric configurations to different regions of the die structure. Edge surfaces are prepared with specific angular orientations optimized for conductive bonding, while other regions of the die maintain their standard geometry. This localized optimization of edge surface quality enhances electrical connection reliability without requiring precision control throughout the entire die structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the creation of a stacked microelectronic assembly with robust and reliable electrical connections, allowing for a more compact design on printed circuit boards and improved performance by ensuring efficient electrical conductivity between the stacked dies.
Implementation Method 1
The conductive elements of the first microelectronic device can be conductively bonded to the at least one conductive element of the second microelectronic device to provide an electrically conductive path therebetween
Implementation Method 2
The conductive elements of the first microelectronic device can be conductively bonded to the at least one conductive element of the second microelectronic device to provide an electrically conductive path therebetween
Implementation Method 3
the electrically conductive elements of each microelectronic device can include first elements formed by plating onto one of the first and second surfaces and second elements formed by plating onto another one of the first and second surfaces
Data Source
AI summary
A microelectronic assembly can include a first microelectronic device and a second microelectronic device. Each microelectronic device has a die structure including at least one semiconductor die and each of the microelectronic devices has a first surface, a second surface remote from the first surface and at least one edge surface extending at angles other than a right angle away from the first and second surfaces. At least one electrically conductive element extends along the first surface onto at least one of the edge surfaces and onto the second surface. At least one conductive element of the first microelectronic device can be conductively bonded to the at least one conductive element of the second microelectronic device to provide an electrically conductive path therebetween.