Wafer Edge Trimming Before Bonding to Prevent Film Peeling
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Solution Overview
Problem
Existing edge-trimming methods for wafer bonding and dicing are inefficient, leading to issues such as film peeling, short trim lifetime, long processing duration, high costs, and increased tool capacity demands.
Innovation Solution
The method involves a pre-bonding edge-trimming process that minimizes the volume of edge-trimmed portions by trimming only the front-side peripheral portion of the first semiconductor substrate, reducing the depth of edge-trimming significantly, typically less than 50 microns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple edge-trimming processes are used after grinding the backside of a bonded wafer, then film peeling is prevented, but processing time increases and tool capacity demand increases
Solution Approach 1:
The patent performs edge-trimming on the front-side peripheral portion of the semiconductor substrate before bonding to another substrate. This preliminary action removes the need for multiple subsequent edge-trimming processes after bonding, as the pre-trimmed edge prevents film peeling during later processing steps. The front-side edge-trimming is done at a shallow depth (less than 50 microns) to minimize material removal while effectively preventing peeling.
Solution Approach 2:
The patent extracts the edge-trimming operation from the post-bonding process sequence and performs it separately on the front-side peripheral portion before bonding. By taking out this specific trimming action and performing it preliminarily, the patent eliminates the need for multiple repeated trimming operations after bonding, thereby reducing processing time while maintaining peeling prevention effectiveness.
2Reliability
If multiple edge-trimming processes are used after grinding, then film peeling is prevented, but manufacturing cost increases
Solution Approach 1:
The patent performs edge-trimming on the front-side peripheral portion of the semiconductor substrate before bonding to another substrate. This preliminary action removes the need for multiple subsequent edge-trimming processes after bonding, as the pre-trimmed edge prevents film peeling during later processing steps. The front-side edge-trimming is done at a shallow depth (less than 50 microns) to minimize material removal while effectively preventing peeling.
Solution Approach 2:
The patent extracts the edge-trimming operation from the post-bonding process sequence and performs it separately on the front-side peripheral portion before bonding. By taking out this specific trimming action and performing it preliminarily, the patent eliminates the need for multiple repeated trimming operations after bonding, thereby reducing processing time while maintaining peeling prevention effectiveness.
3Reliability
If multiple edge-trimming processes are used after grinding, then film peeling is prevented, but edge-trimming tool lifetime decreases
Solution Approach 1:
The patent performs edge-trimming on the front-side peripheral portion of the semiconductor substrate before bonding to another substrate. This preliminary action removes the need for multiple subsequent edge-trimming processes after bonding, as the pre-trimmed edge prevents film peeling during later processing steps. The front-side edge-trimming is done at a shallow depth (less than 50 microns) to minimize material removal while effectively preventing peeling.
Solution Approach 2:
The patent extracts the edge-trimming operation from the post-bonding process sequence and performs it separately on the front-side peripheral portion before bonding. By taking out this specific trimming action and performing it preliminarily, the patent eliminates the need for multiple repeated trimming operations after bonding, thereby reducing processing time while maintaining peeling prevention effectiveness.
4Reliability
If multiple edge-trimming processes are used after grinding, then film peeling is prevented, but device complexity increases
Solution Approach 1:
The patent performs edge-trimming on the front-side peripheral portion of the semiconductor substrate before bonding to another substrate. This preliminary action removes the need for multiple subsequent edge-trimming processes after bonding, as the pre-trimmed edge prevents film peeling during later processing steps. The front-side edge-trimming is done at a shallow depth (less than 50 microns) to minimize material removal while effectively preventing peeling.
Solution Approach 2:
The patent extracts the edge-trimming operation from the post-bonding process sequence and performs it separately on the front-side peripheral portion before bonding. By taking out this specific trimming action and performing it preliminarily, the patent eliminates the need for multiple repeated trimming operations after bonding, thereby reducing processing time while maintaining peeling prevention effectiveness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the amount of trimmed material, thereby decreasing processing time and cost, extending the lifetime of edge-trimming tools, and minimizing flaking or peeling during the bonding process.
Implementation Method 1
a pre-bonding edge-trimming process may be performed to trim a front-side peripheral portion of a first semiconductor substrate
Data Source
AI summary
A front-side peripheral region of a first wafer may be edge-trimmed by performing a first pre-bonding edge-trimming process. A second wafer to be bonded with the first wafer is provided. Optionally, a front-side peripheral region of the second wafer may be edge-trimmed by performing a second pre-bonding edge-trimming process. A front surface of the first wafer is bonded to a front surface of a second wafer to form a bonded assembly. A backside of the first wafer is thinned by performing at least one wafer thinning process. The first wafer and a front-side peripheral region of the second wafer may be edge-trimmed by performing a post-bonding edge-trimming process. The bonded assembly may be subsequently diced into bonded semiconductor chips.


