Semiconductor Wafer Edge Trimming with Protective Insulating Layer
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Solution Overview
Problem
Conventional wafer trimming processes damage bonding electrodes, leading to reduced reliability and yield in wafer stacks during the manufacturing of semiconductor devices.
Innovation Solution
A method involving the sequential formation of insulating and conductive layers, followed by edge trimming and chemical mechanical polishing (CMP) to protect conductive patterns, ensuring the integrity of bonding electrodes and preventing damage during subsequent cleaning processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If edge trimming is performed before back grinding, then chipping or breaking on the wafer edge during back grinding or bumping is prevented, but bonding electrodes are damaged by the cleaning process performed immediately after trimming
Solution Approach 1:
The patent applies preliminary action by forming the fourth insulating layer covering the bonding electrodes before the edge trimming process. This pre-formed protective layer ensures that when trimming occurs, the electrodes are already shielded from damage by the cleaning process that follows trimming, thus resolving the contradiction between preventing edge chipping and protecting electrode integrity
Solution Approach 2:
The fourth insulating layer serves as an intermediary protective barrier between the cleaning process and the bonding electrodes. This intermediate layer absorbs the harmful effect of the cleaning process, allowing the trimming operation to be performed safely without transferring damage to the electrodes, thereby maintaining both edge strength and electrode reliability
2Manufacturing precision
If cleaning process is performed after edge trimming, then particles or contaminants on the wafer surface are removed, but bonding electrodes are damaged leading to reduced yield
Solution Approach 1:
The fourth insulating layer acts as an intermediary protective barrier during the cleaning process. It allows the cleaning operation to effectively remove contaminants and particles from the wafer surface while the insulating layer shields the bonding electrodes from damage, thus achieving both surface cleanliness and electrode integrity
Solution Approach 2:
The patent implements beforehand cushioning by forming the fourth insulating layer that covers and protects the bonding electrodes before the cleaning process begins. This pre-established protective layer cushions the electrodes against the potentially harmful effects of cleaning chemicals or mechanical cleaning actions, ensuring electrode survival while still allowing effective contamination removal
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and yield of semiconductor device manufacturing by preventing electrode damage and ensuring effective bonding, thereby improving the overall quality of the wafer stack.
Implementation Method 1
performing a chemical mechanical polishing (CMP) process to expose a top surface of the conductive pattern
Data Source
AI summary
A method of manufacturing a semiconductor device according to example embodiments includes: sequentially forming first through third insulating layers on a substrate; forming an opening by etching the first through third insulating layers; forming a conductive layer configured in the opening; forming a fourth insulating layer in the opening after the forming of the conductive layer; and removing a portion of an edge region of the substrate after the forming of the fourth insulating layer.