Wafer Event Queue Simulation for Faster Semiconductor Scheduling

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Solution Overview

Problem

Existing semiconductor processing systems face inefficiencies in productivity measurement and simulation time, limiting the optimization of event order and prediction of potential issues during the process.

Innovation Solution

A semiconductor processing system that performs discrete event simulation to optimize the order of events on a wafer, using a processor to select, store, and process event candidates based on system data, and output simulation results efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If discrete event simulation is performed to optimize event order on wafer, then productivity and simulation result consistency are improved, but simulation time and computational complexity increase

Engineering Contradiction:
ImproveUnit per equipment hour (UPEH)VSAvoidSimulation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by pre-selecting event candidates that may occur after an earlier-ending event before executing the full simulation. This pre-filtering reduces the computational scope while maintaining simulation accuracy, thereby improving productivity metrics without proportionally increasing simulation time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The simulation process is segmented into distinct phases: event candidate selection, event execution, and result generation. By dividing the simulation into manageable segments with clear boundaries, the system can optimize each phase independently, improving overall efficiency while maintaining consistent results

Inventive Principle:
Principle #1Segmentation

2Productivity

If discrete event simulation is performed to analyze event order, then productivity improvement is achieved, but device complexity and computational resources increase

Engineering Contradiction:
ImproveUnit per equipment hour (UPEH)VSAvoidSystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Event candidates are pre-identified and selected before the simulation executes, reducing the complexity of real-time decision-making during simulation. This preliminary selection simplifies the overall system architecture while maintaining the capability to optimize event order for improved productivity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

An event queue data structure serves as an intermediary between event candidate selection and event execution. This intermediary layer manages the complexity by providing a structured buffer that decouples the selection logic from the execution logic, reducing overall system complexity while enabling productivity optimization

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250349583A1Semiconductor processing system
Publication Date: 2025.11.13 SAMSUNG ELECTRONICS CO LTD
  • US20250349583A1 patent drawing
  • US20250349583A1 patent drawing
  • US20250349583A1 patent drawing

AI summary

A semiconductor processing system includes a plurality of processing modules in which events for a wafer occur and a processor configured to receive system data related to the event and the plurality of processing modules and perform discrete event simulation of an order of occurrence of the events. The processor is configured to select at least one event that may occur after an event on the wafer ends as an event candidate using the system data, determine one of the event candidates as a selected event, store the selected event in an event queue, sequentially proceed with the selected event stored in the event queue, and delete the selected event whose progress has ended from the event queue. When all the selected events stored in the event queue are deleted, the processor is configured to terminate the discrete event simulation and output simulation result data.