Wafer Exposure Focus-Leveling with Edge Exclusion Regions
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Solution Overview
Problem
Existing exposure systems face challenges in achieving precise focus and leveling control, particularly near the edges of wafers, leading to insufficient focus-leveling control and increased yield loss due to defocused chips.
Innovation Solution
The focus control exclusion region is dynamically set based on the exposure map and chip layout, allowing flexible adjustment of the boundary between effective and exclusion regions, ensuring valid focus-leveling data is used only for chip areas within the effective region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If focus-leveling control is applied across the entire wafer surface, then manufacturing precision is improved, but device complexity increases due to the need to handle invalid data from exclusion regions
Solution Approach 1:
The wafer surface is segmented into an effective region and a focus control exclusion region. Focus-leveling control is applied only to chip areas within the effective region, while chip areas overlapping with the exclusion region are excluded from focus-leveling control. This segmentation allows the system to avoid processing invalid data from the exclusion region, reducing device complexity while maintaining manufacturing precision for valid chip areas.
2Productivity
If the effective region is expanded to cover the entire wafer, then productivity is improved, but measurement precision deteriorates due to insufficient focus-leveling control near wafer edges
Solution Approach 1:
Different quality levels of focus-leveling control are applied to different regions of the wafer. The effective region receives high-precision focus-leveling control using measured focus-leveling data, while the focus control exclusion region near the wafer edges is excluded from such control due to measurement inaccuracies. This local quality approach ensures high measurement precision where applicable while maximizing the usable chip area within the effective region.
3Manufacturing precision
If focus-leveling control is applied to chip areas in the exclusion region, then manufacturing precision is improved, but reliability deteriorates due to use of insufficient data
Solution Approach 1:
Chip areas that overlap with the focus control exclusion region are extracted and excluded from focus-leveling control. The system identifies and separates valid chip areas within the effective region from invalid chip areas in the exclusion region, applying focus-leveling control only to the valid areas. This extraction ensures that focus-leveling control is applied only where reliable measured data exists, maintaining both manufacturing precision and control reliability.
Data Source
AI summary
In a method executed in an exposure apparatus, a focus control effective region and a focus control exclusion region are set based on an exposure map and a chip area layout within an exposure area. Focus-leveling data are measured over a wafer. A photo resist layer on the wafer is exposed with an exposure light. When a chip area of a plurality of chip areas of the exposure area is located within an effective region of a wafer, the chip area is included in the focus control effective region, and when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region In the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.