Wafer Geometry Measurement for Patterned Wafers
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Solution Overview
Problem
Conventional metrology systems are inadequate for measuring and controlling wafer geometry, particularly for patterned wafers, leading to suboptimal polishing and lithography focus errors due to inability to distinguish between front side and backside flatness errors.
Innovation Solution
A method that includes obtaining and optimizing wafer geometry measurements for polishing, separating flatness errors induced by front side and backside surface signatures, and using these measurements to control polishing and lithography processes, applying different pressure levels to achieve a best-flatness condition and compensate for focus errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional metrology systems are used for unpatterned wafers, then wafer flatness can be monitored, but patterned wafers cannot be measured accurately leading to suboptimal polishing and lithography focus errors
Solution Approach 1:
The patent segments the wafer surface into multiple measurement zones (e.g., center, edge, intermediate regions) and applies different measurement and analysis methods to each zone. This allows accurate measurement of patterned wafers by treating different areas independently, resolving the contradiction between measurement precision and adaptability to patterned structures.
Solution Approach 2:
The patent introduces intermediary reference measurements and calibration procedures that mediate between the measurement system and the patterned wafer surface. By using reference standards and intermediary calculation steps, the system achieves accurate flatness measurements on patterned wafers without being affected by the patterns themselves.
2Ease of operation
If uniform pressure is applied during polishing, then the process is simple to control, but front side and backside flatness errors cannot be differentiated leading to suboptimal results
Solution Approach 1:
The patent implements local quality by applying different pressure levels to different regions of the wafer during polishing based on measured flatness errors. The system identifies specific areas requiring correction and applies localized pressure adjustments, enabling differentiation and correction of front side versus backside errors while maintaining operational control.
Solution Approach 2:
The patent transforms the static uniform pressure approach into a dynamic, adaptive pressure distribution system. The polishing pressure is continuously adjusted based on real-time or pre-measured flatness data, allowing the system to respond to specific error patterns on the wafer surface while maintaining ease of operation through automated control.
3Device complexity
If wafer flatness measurements are taken without separating front side and backside errors, then the measurement process is simple, but lithography focus errors cannot be compensated effectively
Solution Approach 1:
The patent segments the flatness measurement into separate front side and backside components. By measuring and analyzing each surface independently, the system can identify which side contributes to focus errors and apply appropriate compensation, resolving the contradiction between measurement simplicity and lithography accuracy.
Solution Approach 2:
The patent replaces complex mechanical measurement approaches with optical or interferometric methods that can independently measure front and back surfaces. This substitution enables separation of surface errors without proportionally increasing device complexity, as the optical systems can capture both surfaces through non-contact measurement.
Data Source
AI summary
Wafer geometry measurement tools and methods for providing improved wafer geometry measurements are disclosed. Wafer front side, backside and flatness measurements are taken into consideration for semiconductor process control. The measurement tools and methods in accordance with embodiments of the present disclosure are suitable for handling any types of wafers, including patterned wafers, without the shortcomings of conventional metrology systems.