Electrical Performance Gradient Modeling for Wafer-Aware IC Design
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Solution Overview
Problem
Conventional integrated circuit design technologies fail to account for non-uniform electrical performance gradients caused by process systematic defects, leading to unpredictable performance variations across a wafer and resulting in discarded dies and reduced production yield.
Innovation Solution
A device and method that construct an electrical performance gradient model using sensors embedded in dies across multiple locations on a wafer, allowing for accurate analysis of circuit performance and predicting performance variations, thereby improving production yield by considering the specific gradient distribution of a target production line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional integrated circuit assistance design technology is used, then the design process is simple, but the electrical performance non-uniformity caused by process systematic defects cannot be predicted, leading to reduced production yield
Solution Approach 1:
The patent applies preliminary action by constructing an electrical performance gradient model before actual circuit design and fabrication. The model predicts performance variations across the wafer based on process systematic defects, allowing designers to anticipate and compensate for non-uniformity before manufacturing, thereby improving production yield without adding complex runtime detection systems
Solution Approach 2:
The patent creates a virtual copy of the electrical performance characteristics across the wafer through modeling. Instead of measuring each die individually during fabrication, the system creates a gradient model that copies and predicts performance values across all locations, reducing the need for extensive physical measurement and testing infrastructure
2Productivity
If process systematic defects are not considered in design, then the design stage is simpler, but performance variations across the wafer cannot be predicted, resulting in discarded dies
Solution Approach 1:
The system performs preliminary characterization of process systematic defects and constructs performance gradient models before circuit design. This advance preparation captures performance gradient information that would otherwise be lost, enabling yield improvement without requiring complex real-time measurement systems during fabrication
Solution Approach 2:
The patent introduces an electrical performance gradient model as an intermediary between the physical fabrication process and the circuit design process. This model mediates by translating process defect characteristics into predictable performance variations, allowing designers to account for non-uniformity without directly measuring each die
Data Source
AI summary
A device and a method for integrated circuit assistance design, and a method for constructing an electrical performance gradient model are provided. The device includes a database and a processor. The database has an electrical performance gradient model. The electrical performance gradient model represents a gradient distribution of an electrical performance in a wafer. The processor is coupled to the database. The processor analyzes a designed circuit by using the electrical performance gradient model.