Wafer Grounding via Pulse Dielectric Breakdown
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Solution Overview
Problem
Conventional wafer grounding methods, such as mechanical piercing and electrical zapping, cause structural damage to the backside dielectric films during the dielectric breakdown process, leading to potential manufacturing yield issues in semiconductor chip production.
Innovation Solution
A wafer grounding and biasing apparatus that uses a pulse current pin in contact with the backside film and a grounding pulse generator to create a current path through dielectric breakdown, with capacitive coupling to the wafer mount for a stable and low-resistance current return path, eliminating the need for a neutralizing pin and reducing damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If mechanical piercing method is used for wafer grounding, then a stable and low-resistance DC path is established, but a large number of particles are created which interfere with manufacturing yield
Solution Approach 1:
The patent replaces the mechanical piercing method with an electrical field-based dielectric breakdown method. Instead of using a physical needle to pierce through the backside film, a high-voltage pulse is applied to create a localized electrical field that causes controlled dielectric breakdown, forming a conductive path through the film without mechanical contact or particle generation.
2Object-generated harmful factors
If electrical zapping method is used for wafer grounding, then particle generation is reduced, but structural damage occurs to the backside dielectric films during dielectric breakdown
Solution Approach 1:
The patent applies local quality by concentrating the electrical field and dielectric breakdown effect to a very small localized region directly beneath the needle electrode. The high-voltage pulse creates a highly non-uniform electrical field distribution, with the maximum field strength confined to a tiny volume, ensuring that dielectric breakdown and conductive path formation occur only in this localized area while the rest of the backside film remains structurally intact.
Solution Approach 2:
The patent uses partial action by applying a high-voltage pulse that is sufficient to cause dielectric breakdown only in the immediate vicinity of the needle electrode tip, rather than across the entire backside film. This controlled partial breakdown creates the necessary conductive path for wafer grounding while leaving the majority of the film structure undamaged.
3Reliability
If conventional wafer grounding methods are used, then a DC path is established, but the architecture and operation become complex requiring multiple pins and controls
Solution Approach 1:
The patent extracts and eliminates the neutralizing pin component from the conventional grounding apparatus. By using a single needle electrode that simultaneously provides both the grounding function (through dielectric breakdown) and the wafer bias current path establishment, the design removes the need for a separate neutralizing pin, simplifying the overall apparatus architecture and operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes grounding damage while ensuring a stable and low-resistance wafer bias current path, optimizing grounding drive conditions and enhancing manufacturing yield by simplifying the architecture and operation.
Implementation Method 1
providing at least one pulse to drive the pulse current pin such that dielectric breakdown occurring at the backside films leads to the establishment of a current path through the backside films
Implementation Method 2
with capacitive coupling to the wafer mount for a stable and low-resistance current return path
Data Source
AI summary
A wafer grounding apparatus and method adaptable to a charged particle beam apparatus is disclosed. A wafer substrate is supported by a wafer mount. A pulse current pin is arranged to be in contact with a backside film formed on a backside of the wafer substrate. A grounding pulse generator provides at least one pulse to drive the pulse current pin such that dielectric breakdown occurring at the backside film leads to establishment of a current path through the backside films. Accordingly, a current flows in the wafer substrate through this current path and then flows out of the wafer substrate via at least one current return path formed from capacitive coupling between the wafer substrate and the wafer mount.