3D Wafer Heat Dissipation Structure Using Seal Ring Conduction
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Solution Overview
Problem
3D stacked chip packages face challenges in dissipating heat effectively, as each chip needs individual heat dissipation paths for robust thermal management and device reliability, and existing solutions often introduce complex structures or additional components.
Innovation Solution
A semiconductor structure is designed with thermal conductive structures embedded within passivation layers and connected to seal rings through connecting structures, utilizing existing seal rings for both thermal transmission and structural stability without adding complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If thermal management structures are added to 3D stacked chip packages, then heat dissipation efficiency is improved, but device complexity increases
Solution Approach 1:
The seal ring is designed to serve dual functions: maintaining structural integrity (original function) and conducting heat away from the chip (new thermal management function). By making the seal ring thermally conductive and connecting it to external heat dissipation structures, the invention eliminates the need for separate thermal management components, thus improving heat dissipation without increasing device complexity
Solution Approach 2:
The invention merges the structural support function and thermal management function into a single integrated system. The seal ring, which originally only provided structural stability, is now combined with thermal conduction capabilities by using thermally conductive materials and connecting it to heat dissipation structures, thereby consolidating multiple functions into one component
2Reliability
If individual heat dissipation paths are created for each chip, then thermal management reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The invention creates individual heat dissipation paths for each chip by segmenting the thermal management system at the chip level. Each chip's seal ring is independently connected to its own heat dissipation structure through conductive vias, ensuring that heat from each chip is dissipated separately. This segmented approach maintains thermal reliability while using standardized manufacturing processes for each chip layer
Solution Approach 2:
The seal ring is prepared with thermal conduction capabilities during the chip fabrication process itself, before the chips are stacked. Thermal vias and conductive structures are formed in advance within the seal ring and passivation layers, so that when chips are stacked, the individual heat dissipation paths are already in place and ready to function, eliminating the need for complex post-assembly thermal management integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design provides efficient heat dissipation paths for each wafer in 3D stacked chip packages, enhancing thermal management and structural stability while maintaining the functional integrity of seal rings.
Implementation Method 1
a thermal conductive structure embedded within the first passivation layer, wherein the thermal conductive structure is connected with the first seal ring through a first connecting structure
Data Source
AI summary
A method of manufacturing a semiconductor structure is provided. The method includes forming a thermal conductive structure embedded within a first passivation layer of a first wafer, and forming a plurality of conductive vias penetrating a first substrate of the first wafer and in contact with the thermal conductive structure. The method further includes forming a first connecting structure in contact with the thermal conductive structure and exposed by a surface of the first passivation layer. The method further includes bonding the first connecting structure of the first wafer to a second connecting structure of a second wafer, and bonding the first passivation layer of the first wafer to a first dielectric layer of the second wafer, wherein a first seal ring embedded within the first dielectric layer of the second wafer is thermally connected to the thermal conductive structure through the first connecting structure and the second connecting structure.