Wafer-Level Image Sensor Packaging With Integrated Light Shield
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Solution Overview
Problem
The existing image sensor packaging methods result in high costs and larger package sizes due to the use of discrete optical components, which is unfavorable for applications like mobile and medical use.
Innovation Solution
The method involves forming on-wafer protection and optical components at the wafer level before separating the substrates into discrete dies, including the integration of a light shield structure along the sidewalls of the image sensor chips, which simplifies manufacturing, reduces package size, and enhances performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete optical components are used in image sensor packaging, then the packaging provides necessary optical functions, but the package size and height increase
Solution Approach 1:
The patent merges discrete optical components (lens, filter, light shield) with the image sensor chip itself, creating an integrated optical sensor chip. The lens is formed as an on-wafer lens directly on the chip surface, the filter is deposited as an on-wafer filter layer, and the light shield is created as an on-wafer light shield structure, eliminating the need for separate discrete components and reducing overall package size.
Solution Approach 2:
The patent transitions from three-dimensional discrete optical components to two-dimensional on-wafer structures. By forming optical elements directly on the wafer surface during manufacturing, the optical functions are achieved within the planar chip footprint rather than requiring additional vertical or lateral space for separate components.
2Reliability
If discrete optical components are used in image sensor packaging, then the packaging provides necessary optical functions, but the manufacturing cost increases
Solution Approach 1:
The patent performs preliminary formation of optical components during the wafer fabrication process itself, before chip separation and final packaging. The on-wafer lens, filter, and light shield are created as integral parts of the chip manufacturing sequence, eliminating subsequent assembly steps and reducing overall manufacturing complexity and cost.
Solution Approach 2:
The patent combines multiple manufacturing processes into a single integrated workflow where optical components are formed during wafer fabrication rather than assembled separately. This merging of component creation with chip manufacturing reduces the number of discrete assembly steps, lowers labor costs, and simplifies the supply chain.
3Reliability
If discrete optical components are used in image sensor packaging, then the packaging provides necessary optical functions, but the assembly process becomes more complex
Solution Approach 1:
The patent merges the formation of multiple optical components (lens, filter, light shield) into a single integrated chip structure. This consolidation reduces the number of separate assembly operations required, as all optical elements are already positioned and integrated on the chip before final packaging, significantly simplifying the assembly process.
Solution Approach 2:
The patent segments the optical system into functional layers integrated on the chip (lens layer, filter layer, light shield structure) that are formed separately during manufacturing but function as a unified system. This segmentation during fabrication allows for precise control of each component while simplifying final assembly since no separate alignment or positioning is needed.
Data Source
AI summary
A method for forming an image sensor package is provided. An image sensor chip is formed over a package substrate. A protection layer is formed overlying the image sensor chip. The protection layer has a planar top surface and a bottom surface lining and contacting structures under the protection layer. An opening is formed into the protection layer and spaced around a periphery of the image sensor chip. A light shielding material is filled in the opening to form an on-wafer shield structure having a sidewall directly contact the protection layer.