Wafer Inspection Data Storage via Distributed Processor Nodes
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Solution Overview
Problem
Current wafer inspection systems face challenges in storing and processing large amounts of image data due to limitations in data storage and processing speed, leading to the discarding of 'state' information and the use of simple defect detection algorithms, which limits the complexity and accuracy of defect detection.
Innovation Solution
A system and method for storing image data generated by scanning a wafer using processor nodes and storage media, allowing for the retention of data across scans and enabling the use of more complex defect detection algorithms without reducing data acquisition speed, by employing a virtual inspection system that stores and processes image data in a distributed and scalable manner.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If image data is stored rapidly to match data acquisition speed, then data storage capacity is improved, but data processing complexity increases
Solution Approach 1:
The patent divides the wafer into multiple swaths and further subdivides each swath into sub-swaths, assigning each sub-swath to a different processor node for parallel processing. This segmentation allows the system to handle large volumes of image data without overwhelming a single processing unit, effectively resolving the contradiction between storage capacity and processing complexity.
Solution Approach 2:
The patent introduces a distributed processing architecture across multiple processor nodes, adding a spatial dimension to data processing. By distributing data storage and processing across multiple nodes rather than using a single centralized system, the patent scales the system to handle terabytes of data while maintaining manageable processing complexity at each node.
2Measurement precision
If complex defect detection algorithms are used, then defect detection accuracy is improved, but data processing speed decreases
Solution Approach 1:
The patent segments the wafer inspection task into multiple sub-swaths processed in parallel by different processor nodes. Each node executes complex defect detection algorithms on its assigned sub-swath independently, allowing high computational complexity algorithms to run without serial bottlenecks, thus maintaining both accuracy and throughput.
Solution Approach 2:
The patent implements continuous data acquisition and parallel processing where multiple processor nodes continuously process different portions of the wafer simultaneously. This eliminates idle time and ensures that complex algorithms are executed continuously across the distributed system, maintaining high processing speed while using sophisticated detection methods.
3Ease of operation
If data is discarded after processing to free memory, then memory management is improved, but state information is lost
Solution Approach 1:
The patent divides image data into multiple sub-swaths that are processed independently by different processor nodes. Each node maintains state information only for its assigned sub-swath, reducing memory requirements while preserving necessary state data for defect detection algorithms that require historical context within each sub-swath.
Solution Approach 2:
The patent creates a virtual inspection system that stores and processes copies of image data across multiple processor nodes. Instead of discarding original data, the system maintains data copies in distributed storage, allowing state information to be preserved and accessed as needed while freeing up processing memory for new data.
Data Source
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AI summary
Various systems and methods for creating persistent data for a wafer and using persistent data for inspection-related functions are provided. One system includes a set of processor nodes coupled to a detector of an inspection system. Each of the processor nodes is configured to receive a portion of image data generated by the detector during scanning of a wafer. The system also includes an array of storage media separately coupled to each of the processor nodes. The processor nodes are configured to send all of the image data or a selected portion of the image data received by the processor nodes to the arrays of storage media such that all of the image data or the selected portion of the image data generated by the detector during the scanning of the wafer is stored in the arrays of the storage media.