Wafer Inspection Using Dynamic Reference Generation for Misaligned Dies
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Solution Overview
Problem
The Wafer Level Fan Out (WLFO) process faces challenges in inspecting misaligned dies and redistribution layer (RDL) conductors, where a single reference is impossible due to unique construction and varying die alignments, making defect detection difficult and requiring advanced control stages.
Innovation Solution
An inspection system and method that utilize CAD information to generate dynamic or static reference information for each die, allowing for efficient separation of RDL and die layers, and employing an imaging device to capture images and process them for defect detection, enabling optimal detection and alignment of both layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single reference is used for inspection, then the inspection process is simplified, but it becomes impossible to accurately inspect misaligned dies and RDL conductors with unique constructions
Solution Approach 1:
The patent divides the wafer into multiple wafer segments, each containing a die and its associated RDL conductors. Each segment is inspected using its own dynamically generated reference information, allowing unique construction variations and misalignments to be accommodated while maintaining inspection accuracy.
Solution Approach 2:
The patent implements dynamic reference generation by combining CAD information with actual wafer images to create reference information that adapts to each wafer segment's specific orientation and construction. This dynamic approach replaces static single-reference methods, enabling accurate inspection of misaligned dies and uniquely constructed RDL conductors.
2Measurement precision
If dynamic reference generation is implemented for each wafer segment, then defect detection accuracy is improved, but the setup process becomes more complex
Solution Approach 1:
The patent performs preliminary actions by automatically determining die orientation and generating reference information for each wafer segment during the setup process. This preliminary generation of segment-specific references simplifies the subsequent inspection process and reduces manual intervention, offsetting the initial complexity with automation.
Solution Approach 2:
The patent changes inspection parameters dynamically by adjusting reference information generation based on each wafer segment's specific characteristics, including die orientation, RDL conductor layout, and construction variations. This parameter adaptation enables accurate defect detection while the automated process manages setup complexity.
3Measurement precision
If advanced control stages are used to inspect unique RDL conductor constructions, then inspection accuracy is improved, but processing time and complexity increase
Solution Approach 1:
The patent creates reference copies of each wafer segment's RDL conductors by combining CAD information with actual wafer images. These dynamic reference copies accurately represent the unique construction of each segment, enabling automated comparison and defect detection without requiring complex manual inspection procedures.
Solution Approach 2:
The patent replaces complex mechanical inspection procedures with an automated imaging and image processing system. By using optical imaging combined with computer-generated reference information, the system achieves accurate inspection of unique RDL conductor constructions while maintaining high processing speed through automation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system effectively distinguishes between RDL and die layers, facilitating easier and faster setup, improved defect detection, and adaptability to design changes, enhancing the accuracy and robustness of the inspection process.
Implementation Method 1
obtaining first images of the group of wafer segments includes illuminating the group of wafer segments with radiation and detecting radiation scattered or reflected from the group of wafer segments
Implementation Method 2
obtaining first images of the group of wafer segments includes illuminating the group of wafer segments with radiation and detecting radiation scattered or reflected from the group of wafer segments
Data Source
AI summary
A method for inspecting a group of dies of a wafer, wherein the wafer comprises a group of wafer segments, wherein each wafer segment comprises a die of the group of dies, a molded material that surrounds the die and redistribution layer (RDL) conductors that are coupled to the die and are positioned above the die and the molded material, wherein the method includes the steps of: receiving design information about the RDL conductors of each wafer segment of the group of wafer segments; obtaining, during a setup process, first images of the group of wafer segments; wherein the obtaining of the first images comprises illuminating the group of wafer segments with radiation and detecting radiation scattered or reflected from the group of wafer segments as a result of the illuminating; generating reference information based on the design information about the RDL conductors of one or more wafer segments of the group of wafer segments and at least one first image of the one or more first images; acquiring, during an inspection process, a second image of each wafer segment of the group of wafer segments; and evaluating each wafer segment of the group of wafer segments based on the second image of the wafer segment and the reference information of the wafer segment.