Wafer Inspection Optical Mode Selection Using Layout Simulation

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Solution Overview

Problem

Existing wafer inspection systems require repetitive inspections of real defects on real wafers to optimize optical parameters, which is time-consuming and inefficient due to the numerous possible combinations of optical parameter values.

Innovation Solution

The system optimizes inspection parameters through simulation rather than real wafer inspections, using a 3D model of the IC design layout to identify optimal optical modes for defect detection, and includes mechanisms for retraining optical parameters in response to process condition changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If repetitive inspections of real defects on real wafers are performed to optimize optical parameters, then optimal detection can be achieved, but inspection time increases and efficiency decreases

Engineering Contradiction:
Improvedefect detection optimizationVSAvoidinspection time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent creates virtual copies of wafers and defects through 3D modeling and simulation. Instead of repeatedly inspecting real wafers with real defects, the system generates virtual wafer models with simulated defects that replicate real-world scenarios. This allows optical parameter optimization to be performed on virtual copies rather than physical wafers, dramatically reducing inspection time while maintaining detection accuracy.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The system performs preliminary optimization of optical parameters through simulation before actual inspection. By pre-optimizing parameters using virtual wafer models and simulated defects, the system prepares optimal inspection settings in advance. This preliminary action eliminates the need for time-consuming repetitive inspections during production, as the parameters are already optimized before real wafers enter the inspection process.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If all possible combinations of optical parameter values are tested on real wafers, then optimal parameters can be identified, but productivity decreases

Engineering Contradiction:
Improveoptical parameter optimizationVSAvoidinspection efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent replaces physical testing of all parameter combinations on real wafers with virtual simulations. The system creates a virtual testing environment where computational models evaluate different optical parameter combinations against simulated defect data. This copying approach allows exhaustive parameter exploration without the time and resource constraints of physical experimentation, maintaining optimization precision while preserving productivity.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The system substitutes the mechanical inspection process with computational simulation. Instead of physically adjusting optical parameters and inspecting real wafers for each parameter combination, the patent uses software-based simulation to evaluate parameter effectiveness. This replacement of mechanical experimentation with computational analysis enables rapid parameter optimization without sacrificing detection accuracy, directly addressing the productivity-precision trade-off.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12204842B2Optical mode optimization for wafer inspection
Publication Date: 2025.01.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12204842B2 patent drawing
  • US12204842B2 patent drawing
  • US12204842B2 patent drawing

AI summary

According to some embodiments, the present disclosure provides a method for determining wafer inspection parameters. The method includes identifying an area of interest in an IC design layout, performing an inspection simulation on the area of interest by generating a plurality of simulated optical images from the area of interest using a plurality of optical modes, and selecting, based on the simulated optical images, at least one of the optical modes to use for inspecting an area of a wafer that is fabricated based on the area of interest in the IC design layout.