Mixed-Mode Wafer Inspection Pixel Mapping
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Solution Overview
Problem
Current semiconductor wafer inspection methods face challenges in detecting defects at smaller scales due to decreasing device dimensions, requiring improved inspection capabilities to identify defects in increasingly smaller features on wafers.
Innovation Solution
A mixed-mode wafer inspection method that includes adjusting pixel sizes to map wafer dies and blocks to integer numbers of pixels, allowing for simultaneous cell-to-cell, block-to-block, and die-to-die comparisons, as well as field-to-field comparisons using a reference image, to enhance defect detection sensitivity and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional wafer inspection methods are used, then inspection coverage is provided, but defect detection sensitivity and accuracy deteriorate due to decreasing device dimensions
Solution Approach 1:
The inspection method segments the wafer into multiple fields of view that are imaged separately and then computationally combined. This segmentation allows each field to be imaged at optimal magnification while maintaining comprehensive coverage, improving defect detection sensitivity for small features without sacrificing overall inspection capability
Solution Approach 2:
The patent transitions from direct single-field imaging to a multi-dimensional approach by capturing multiple fields at different positions and combining them computationally. This dimensional transformation enables high-magnification imaging of small features while maintaining context of the entire wafer area, resolving the contradiction between detection sensitivity and measurement difficulty
2Manufacturing precision
If pixel size is adjusted to map each die to an integer number of pixels, then alignment precision improves, but the complexity of the inspection system increases
Solution Approach 1:
The system dynamically adjusts the pixel size parameter to ensure that each die maps to an integer number of pixels in the captured image. This parameter change enables precise alignment and registration of multiple fields without requiring complex hardware modifications, achieving high manufacturing precision through software-controlled parameter optimization
Solution Approach 2:
The patent creates a digital reference copy of the wafer layout and uses it to guide the adjustment of pixel sizes and field mappings. This copying approach allows the system to simulate and optimize alignment parameters computationally before applying them to the actual inspection process, reducing system complexity while maintaining high precision
Data Source
AI summary
Mixed-mode includes receiving inspection results including one or more images of a selected region of the wafer, the one or more images include one or more wafer die including a set of repeating blocks, the set of repeating blocks a set of repeating cells. In addition, mixed-mode inspection includes adjusting a pixel size of the one or more images to map each cell, block and die to an integer number of pixels. Further, mixed-mode inspection includes comparing a first wafer die to a second wafer die to identify an occurrence of one or more defects in the first or second wafer die, comparing a first block to a second block to identify an occurrence of one or more defects in the first or second blocks and comparing a first cell to a second cell to identify an occurrence of one or more defects in the first or second cells.