Semiconductor Wafer Insulating Layer Structuring Without Photolithography
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Solution Overview
Problem
Existing methods for structuring insulating layers on semiconductor wafers with passage openings are inefficient and require photolithographic processes, which are time-consuming and material-intensive, and do not provide reliable protection for the insulating layer during etching.
Innovation Solution
A method involving the two-dimensional deposition of an insulating layer on semiconductor wafers with oval passage openings, followed by the structured deposition of an etch-resistant filling material using a printing process, such as inkjet or screen printing, to protect the insulating layer and simplify the structuring process, eliminating the need for photolithographic steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If photolithographic structuring is used to structure the insulating layer, then the insulating layer can be reliably protected during etching, but the process becomes time-consuming and material-intensive
Solution Approach 1:
The patent applies preliminary action by depositing the etch-resistant filling material into the passage contact opening and onto the front side area before the insulating layer is deposited. This pre-positioned filling material serves as a protective template during subsequent etching processes, eliminating the need for time-consuming photolithographic structuring while ensuring reliable protection of the insulating layer. The filling material is already in place to define the etch pattern before the insulating layer is applied.
2Reliability
If photolithographic structuring is used to structure the insulating layer, then the insulating layer can be reliably protected during etching, but the process becomes material-intensive
Solution Approach 1:
The patent extracts the photolithographic structuring steps from the process flow and replaces them with a simpler deposition of etch-resistant filling material. By removing the photoresist coating, photolithographic patterning, and photoresist removal steps, the process significantly reduces material consumption while maintaining reliable protection of the insulating layer during etching. Only the essential etch-resistant filling material remains in the process.
3Area of stationary object
If the insulating layer is two-dimensionally deposited on the front side and side surface, then complete coverage is achieved, but the insulating layer must be removed again locally requiring additional structuring steps
Solution Approach 1:
The patent uses preliminary action by pre-depositing the etch-resistant filling material into the passage contact opening and onto the front side area before the insulating layer is deposited. This creates a built-in protection structure that eliminates the need for subsequent local removal of the insulating layer. The filling material serves as a permanent mask that defines the etch pattern, simplifying the overall structuring process.
4Reliability
If conventional structuring methods are used, then the passage contact opening can be protected, but the process requires multiple steps including photoresist deposition, photolithographic structuring, and wet chemical etching
Solution Approach 1:
The patent extracts and removes the photoresist deposition, photolithographic structuring, and photoresist removal steps from the conventional process flow. By replacing these multiple complex steps with a single deposition of etch-resistant filling material, the process significantly improves productivity while maintaining reliable protection of the passage contact opening during etching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces material consumption and technical effort, increases reliability and yield, and allows for the cost-effective production of highly efficient multi-junction solar cells with electrical connections between the front and rear sides, while avoiding the use of lacquer layers and photolithographic processes.
Implementation Method 1
two-dimensional deposition of an insulating layer on the top of the semiconductor wafer, the side wall of the passage opening and/or the bottom of the semiconductor wafer
Implementation Method 2
structured deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening and into the passage opening
Data Source
AI summary
A method for structuring an insulating layer on a semiconductor wafer, at least comprising the steps of: Provision of a semiconductor wafer with a top, a bottom and comprising multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening, and into the passage opening.