Semiconductor Wafer Laser Stealth Dicing and Blade Cleaning
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Solution Overview
Problem
Traditional blade dicing and laser dicing techniques often result in die cracking and require large sawlane widths, reducing die strength and the number of usable IC dies per wafer, which is a concern for applications like RFID tags and financial cards that require high mechanical strength.
Innovation Solution
The method combines laser stealth dicing to create a stealth dicing layer within the semiconductor wafer, followed by back-side blade cleaning to remove a portion of this layer, enhancing sidewall strength and achieving a smaller sawlane width without damaging the circuitry surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If traditional blade dicing or laser dicing is used to separate semiconductor wafer, then wafer separation is achieved, but die cracks occur during assembly process reducing die strength
Solution Approach 1:
The dicing process is divided into two distinct stages: first, laser stealth dicing creates an initial separation path within the wafer, and second, blade dicing completes the separation by removing the modified layer. This segmentation allows each method to perform its optimal function while avoiding the drawbacks of using either method alone.
Solution Approach 2:
Laser stealth dicing is performed as a preliminary action before blade dicing. The laser creates a modified silicon layer that serves as a guide path for the subsequent blade, enabling the blade to follow a precise trajectory and separate dies without causing cracks that would occur with direct blade dicing.
2Productivity
If traditional blade dicing is used, then wafer separation is achieved, but large sawlane width is required reducing potential good dies per wafer
Solution Approach 1:
The invention replaces the purely mechanical blade dicing system with a hybrid approach that uses laser energy to create the initial separation path. This substitution allows the blade to operate with minimal width since it only needs to remove the pre-modified silicon layer rather than cutting through the entire wafer thickness mechanically.
3Strength
If laser stealth dicing is used to form stealth dicing layer, then die strength is improved, but additional processing step is required
Solution Approach 1:
The invention merges laser stealth dicing and blade dicing into a single integrated processing sequence. The laser creates the modified silicon layer and the blade removes it in continuous operation, combining the advantages of both methods while maintaining process efficiency. The blade cleaning step also serves dual purposes: removing the modified layer and preparing the die surfaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the sidewall strength of individual IC dies, reduces cracking during assembly, and increases the number of usable dies per wafer, making the process suitable for high-stress applications like RFID tags and financial cards.
Implementation Method 1
applying a laser beam through a silicon substrate of the semiconductor wafer at a focus point that is within the silicon substrate to change a monocrystalline silicon structure around the focus point into a polycrystalline silicon structure
Implementation Method 2
cleaning the semiconductor wafer from a back-side surface of the semiconductor wafer with a blade to remove at least a portion of the stealth dicing layer
Data Source
AI summary
Embodiments of methods and systems for processing a semiconductor wafer are described. In one embodiment, a method for processing a semiconductor wafer involves performing laser stealth dicing on the semiconductor wafer to form a stealth dicing layer within the semiconductor wafer and after performing laser stealth dicing, cleaning the semiconductor wafer from a back-side surface of the semiconductor wafer with a blade to remove at least a portion of the stealth dicing layer. Other embodiments are also described.