Semiconductor Wafer Laser Splitting Layout to Reduce Chipping

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Solution Overview

Problem

Existing methods of cutting wafers for semiconductor elements often result in substrate chipping, which can damage the semiconductor layers and affect the integrity of the elements.

Innovation Solution

A method involving the formation of specific modified portions within the substrate using laser light, followed by controlled cracking and splitting, where the number and arrangement of modified portions are optimized to minimize chipping and facilitate clean separation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional laser cutting method forming two parallel columns of modified regions is used, then cutting efficiency is improved, but substrate chipping occurs

Engineering Contradiction:
Improvecutting efficiencyVSAvoidsubstrate integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The modified regions are segmented into three distinct columns: first column (closest to semiconductor layers), second column (intermediate), and third column (farthest). This segmentation allows different regions to serve different functions - the first column maintains substrate integrity while the second and third columns facilitate cracking and separation, thereby preventing chipping while maintaining cutting efficiency

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each column of modified regions has distinct local characteristics. The first column has modified regions with specific properties that prevent chipping, while the second and third columns have modified regions optimized for crack initiation and propagation. This local differentiation resolves the contradiction by assigning different qualities to different spatial locations

Inventive Principle:
Principle #3Local quality

2Productivity

If modified regions are formed closer to semiconductor layers to improve separation, then separation efficiency is improved, but risk of damaging semiconductor layers increases

Engineering Contradiction:
Improveseparation efficiencyVSAvoiddamage risk to semiconductor layers
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The first column of modified regions is formed in advance at a safe distance from the semiconductor layers. This preliminary action creates a buffer zone that allows subsequent cracking and separation to occur without directly impacting the semiconductor layers, thus maintaining both separation efficiency and safety

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The first column of modified regions acts as an intermediary between the laser processing zone and the semiconductor layers. It absorbs the mechanical stress and cracking energy, preventing direct transmission of harmful forces to the semiconductor layers while still enabling effective separation

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method reduces substrate chipping, enhances the extraction of light from lateral faces, and maintains the integrity of semiconductor layers, facilitating efficient production of semiconductor elements.

Implementation Method 1

forming a first modified portion by irradiating laser light within the substrate from the first face side of the substrate

Methodology Applied
Scientific EffectLaser heating: Laser

Implementation Method 2

a process of splitting the substrate by pressuring the substrate from the second face side using a pressure member

Methodology Applied
Scientific EffectThermal stress: Thermal Expansion

Data Source

PatentUS20260008134A1Method of manufacturing semiconductor element and semiconductor element
Publication Date: 2026.01.08 NICHIA CORP
  • US20260008134A1 patent drawing
  • US20260008134A1 patent drawing
  • US20260008134A1 patent drawing

AI summary

A method of manufacturing a semiconductor element includes: a first process that includes forming a first modified portion in the substrate, and forming a second modified portion at a position next to the first modified portion in a first direction, and a process of forming a plurality of third modified portions arranged in a thickness direction of the substrate at positions that are closer to the first face of the substrate than is the first modified portion and overlapping the first modified portion in a plan view. No modified portions are formed at positions that are next to the third modified portions in the first direction to overlap the second modified portions in a plan view. The number of the first modified portions arranged in the thickness direction is equal to or less than the number of the third modified portions arranged in the thickness direction.